Macronix International Co., Ltd.

Erh Kun Lai

Kuang Yeu Hsieh

ChiaHua Ho

Hang-Ting Lue

Chia Hua Ho

Yi Chou Chen

A memory device including a programmable resistive memory material is described along with methods for manufacturing the memory device. A memory device disclosed herein includes top and bottom electrodes and a multilayer stack disposed between the top and bottom electrodes. The multilayer stack includes a memory element comprising programmable resistive memory material and has a sidewall surface. An air gap is adjacent to the sidewall surface and self-aligned to the memory element.

Method for manufacturing a resistor random access memory with a self-aligned air gap insulator

A NAND memory device is constructed using Silicon On Insulator (SOI) techniques. In particular, Thin Film Transistor (TFT) techniques can be used to fabricate the NAND Flash memory device. In both SOI and TFT structures, the body, or well, is isolated. This can be used to enable a bit-by-bit programming and erasing of individual cells and allows tight control of the threshold voltage, which can enable MLC operation.

Methods and apparatus for implementing bit-by-bit erase of a flash memory device

A memory device has a sidewall insulating member with a sidewall insulating member length according to a first spacer layer thickness. A first electrode formed from a second spacer layer having a first electrode length according to a thickness of a second spacer layer and a second electrode formed from the second spacer layer having a second electrode length according to the thickness of the second spacer layer are formed on sidewalls of the sidewall insulating member. A bridge of memory material having a bridge width extends from a top surface of the first electrode to a top surface of the second electrode across a top surface of the sidewall insulating member, wherein the bridge comprises memory material.

Resistor random access memory cell with reduced active area and reduced contact areas

Memory devices based on tungsten-oxide memory regions are described, along with methods for manufacturing and methods for programming such devices. The tungsten-oxide memory region can be formed by oxidation of tungsten material using a non-critical mask, or even no mask at all in some embodiments. A memory device described herein includes a bottom electrode and a memory element on the bottom electrode. The memory element comprises at least one tungsten-oxygen compound and is programmable to at least two resistance states. A top electrode comprising a barrier material is on the memory element, the barrier material preventing movement of metal-ions from the top electrode into the memory element.

Resistance memory with tungsten compound and manufacturing

A phase change random access memory PCRAM device is described suitable for use in large-scale integrated circuits. An exemplary memory device has a pipe-shaped first electrode formed from a first electrode layer on a sidewall of a sidewall support structure. A sidewall spacer insulating member is formed from a first oxide layer and a second, 'L-shaped,' electrode is formed on the insulating member. An electrical contact is connected to the horizontal portion of the second electrode. A bridge of memory material extends from a top surface of the first electrode to a top surface of the second electrode across a top surface of the sidewall spacer insulating member.

Resistor random access memory cell with L-shaped electrode

A method for manufacturing a phase change memory device comprises forming an electrode layer. Electrodes are made in the electrode layer using conductor fill techniques that are also used inter-layer conductors for metallization layers, in order to improve process scaling with shrinking critical dimensions for metallization layers. The electrode layer is made by forming a multi-layer dielectric layer on a substrate, etching the multi-layer dielectric layer to form vias for electrode members contacting circuitry below, forming insulating spacers on the vias, etching through a top layer in the multi-layer dielectric layer to form trenches between the insulating spacers for electrode members contacting circuitry above, filling the vias and trenches with a conductive material using the metallization process. Thin film bridges of memory material are formed over the electrode layer.

Manufacturing method for phase change RAM with electrode layer process

Programmable resistive RAM cells have a resistance that depends on the size of the programmable resistive elements. Manufacturing methods and integrated circuits for programmable resistive elements with uniform resistance are disclosed that have a cross-section of reduced size compared to the cross-section of the interlayer contacts.

Programmable resistive RAM and manufacturing method

A manufacturing method for stacked, non-volatile memory device provides a plurality of bitline layers and wordline layers with charge trapping structures. The bitline layers have a plurality of bitlines formed on an insulating layer, such as silicon on insulator technologies. The wordline layers are patterned with respective pluralities of wordlines and charge trapping structures, orthoganal to the bitlines.

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Longjing Shiang, Taiwan

Erh Kun Lai