Cselt-centro Studi E Laboratori Telecomunicazioni S.p.a.

Cselt- Centro Studi E Laboratori Telecommunicazioni Spa

Enzo Garetti

Piero Calcagno

Piero Belforte

Luciano Pilati

Renato Manfreddi

Mario Bondonno

Giancarlo Guaschino

Cristiano Dall'Olio

Gunter Lobisch

Vincenzo Bernardini

An automatic exchange of a telephone system comprises a PCM switching network with a plurality of cascaded stages for establishing temporal and spatial connections between incoming channels on input lines of the first stage and outgoing channels on output lines of the last stage in response to commands from external controllers dialoguing with internal controllers of the network. Pairs of switching matrices forming part of nonadjacent stages are combined into modular switching units each provided with its own internal controller. Routing instructions are transmitted from an external controller to a first internal controller which selects a signal path through the matrices of its own switching unit and informs a second internal controller of that selection whereupon the latter extends the path through an adjoining switching unit, and so on until the connection is completed. With digital message words such as speech bytes traveling in a forward direction from the input side to the output side of the network, the instruction words pertaining thereto move in the opposite direction over the same interstage links; the two paths are mutually conjugate within each switching unit, their matrices being bypassed by the routing instructions.

Modular self-routing PCM switching network for distributed-control

A five-stage PCM switching network of an automatic telephone exchange is divided into a set of outer modular units each including a first-stage and a fifth-stage matrix, a set of inner modular units each including a second-stage and a fourth-stage matrix, and a set of central modular units each including a pair of third-stage matrices. Each modular unit is provided with an individual base-level microprocessor controlling the switching of its matrices and the checking of their performance with the aid of ancillary equipment including transceivers sending back outgoing signals and samplers delivering bytes from corresponding time slots at opposite ends of an established signal path to a comparator in the associated microprocessor. Each set is divided into several subsets provided with respective intermediate-level microprocessors which control their base-level microprocessors; a top-level microprocessor, responsive to commands from a central controller, dialogues with the intermediate-level microprocessors for setting up and discontinuing calling connections between incoming PCM lines joined to inputs of the first-stage matrices and outgoing PCM lines joined to outputs of the fifth-stage matrices.

Modular structure for multistage PCM switching network

A mass memory for use with telecommunication equipment comprises a plurality of memory units associated with respective controllers. Each memory unit includes a command module, dialoguing with the associated controller, and a multiplicity of memory modules for the storage of respective information and redundancy bits of a number of data words, one bit of each word being written in an integrated charge-transfer circuit individually assigned thereto and being continuously recirculated when the memory unit is idle. The command module contains a corrective logic which includes a generator of redundancy bits and intervenes during reading and writing phases. An input/output unit, also forming part of the command module, may comprise a switching circuit including a set of multiplexers which may be selectively operated by instructions from the controller to replace a defective memory module by a spare module whose bit-storing circuits already contain the data of the defective module or can receive them in a reinitialization operation. Instead of a single command module, three such modules synchronized with one another can be used to control the reading and writing through majority logic.

Self-correcting, solid-state-mass-memory organized by bits and with

A stored-program control system for a telephone exchange or the like comprises processing units coupled to several main memories and to several mass memories. Each mass memory includes one or more memory modules each with one or more rows of shift registers of the charge-coupled type, operating in a serial-parallel-serial mode, and a control module equipped with a self-correcting logic and a microprogrammed time base.

Self-correcting solid-state mass memory organized by words for a

For the selective energization of combinations of up to m data outputs of a data concentrator with n data inputs (n &gt; m), the concentrator is provided with n control inputs energizable in various patterns. The concentrator comprises a logic network with an enabling section and a performing section, each in the form of a truncated orthogonal matrix with m rows and n columns of gating circuits. In each matrix the number of gating circuits decreases from n in the first row to (n-m+1) in the last row. The gating circuits of each column of the enabling matrix are connected in parallel to a respective control input whose energization gives rise to an internal activation signal in one of these circuits and simultaneously blocks the circuits of the same row while unblocking those on a diagonal for possible activation by the energization of one of the following control inputs; thus, only one activation signal can come from any row and the number of such activation signals -- up to m -- depends on the number of energized control inputs. The gating circuits of the performing section consist each of a coincidence (NAND or AND) gate connected on the one hand to an output terminal of the corresponding circuit of the enabling matrix and on the other hand to a data input, the gates of each column being connected to the same data input in parallel; the gates of each row work into a common summing circuit (NAND or OR gate) energizing a respective data output if an activation signal is applied to a gating circuit of that row connected to an energized data input.

Logic network for programmable data concentrator

Message transmission between subscriber stations served by different central offices takes place via frequency-division channels through the intermediary of couplers recognizing different line signals, specifically pulse sequences modulating the amplitude of a fixed-frequency oscillation on a test wire, to initiate certain switching operations. A processor, responding to these signals either upon initiation of a connection or in the course thereof, summons an available modem which is temporarily connected to the associated coupler and emits a characteristic a-c signal picked up by a remote coupler at another exchange which thereupon causes its processor to connect another modem to it, to the exclusion of any subscriber line to which that coupler may have been previously connected. The two modems then intercommunicate and work into respective logic networks which, under their control, carry out the requisite switching operations whereupon the modems are released upon establishment or re-establishment of the desired connection.

Inter-office signaling system for telecommunication network

A call monitor for a telephone exchange, including a processor intervening in the establishment of a connection between associated line links with the aid of a switching network, comprises a first memory storing information about each line link and a second memory containing codes that identify all possible states of a connection of interest to the processor along with all intervening conditions termed evolutions. During a time slot allocated to a particular line link, a multibit comparator receives data from the first memory concerning a connection involving that line link, along with updating information from the line link itself, on one set of inputs and further receives, on another set of inputs, a succession of evolutionary codes read out from the second memory until a match is detected; the read-out is then terminated and an instruction, if required, is sent to the processor and/or to the switching network.

Call monitor for telecommunication exchange

Switching criteria are transmitted over a plurality of trunk lines to a central office of a telecommunication system in the form of a set of binary signals modulated on three carriers for each trunk line, the triads of carriers being cyclically sampled and demodulated. During each sampling interval t.sub.i allocated to a particular trunk G.sub.i within a cycle, a locally generated identification code of that trunk is transmitted to each of three sections of a read-only memory MS, each memory section permanently storing four different threshold values for the length of 'on' signals (1) and 'off' signals (0). Integrators IN, rejecting spurious changeovers from one type of signal to the other, feed respective counters CT via respective coincidence circuits CFR which receive from a register MG the bits of the preceding cycle and reset arithmetic units .sigma. in these counters whenever there is a definite change in the type of signal received; each counter CT, emitting a count which increases by 1 in each new cycle, is maintained at its maximum count (unless previously reset) as long as no change occurs. The count of each counter is compared with the several threshold values, stored in the associated memory section, in a corresponding section of a comparator CMP whose output is delivered to a processor AC.

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Turin, Italy

Enzo Garetti