Eastman-kodak Company

Hughes Aircraft Company

The Perkin-elmer Corporation

Hughes Danbury Optical Systems, Inc.

Enrique Garcia

Richard R Poole

Peter L Dillon

William America

A charge-coupled imaging device (FIG.,) is thinned to allow for backside illumination. The device is further enhanced using ion implantation techniques to establish an electrical field (,) at the back surface, which functions to drive free electrons to potential wells generated beneath a gate structure (,) on the front surface. The device structure allows for both front side and backside illumination and is useful as a imaging device in applications where it is necessary to combine images from two different optical sources. The imaging device is particularly useful in terrestrial guidance systems (FIG.,) where the imaging device is used to detect guide stars from a large guide star field. In such systems, the imaging device must be translated within an X-Y plane in order to cover the entire guide star field. In order to accurately know the position of the imaging device, optical fiducial marks are imaged onto a side of the imaging device opposite the side receiving the guide star photons. Using the two-sided imaging device allows for the elimination of optical elements necessary for combining the optical signals, particular the use of beam splitters.

Two-sided solid-state imager in a navigational device

A method for fabricating thinned, back-illuminated, solid state image sensors 10 includes steps of positively doping a bottom surface 22 of a top semiconductor wafer 24, and bonding the bottom surface 22 of the top semiconductor wafer 24 to a top surface 26 of a bottom semiconductor wafer 28 with a silicon dioxide passivation layer 34 in between. The top wafer 24 is thinned and an insulating layer of silicon dioxide 36 and a polysilicon gate structure 38 are formed thereover. Individual dies 40 are then formed, which are bonded to a substrate 42 along each pixel face. The bottom semiconductor wafer layer 28 is etched away to expose the silicon dioxide passivation layer 34, which acts to protect the thinned top wafer layer 24. The dies 40 are then etched to expose bonding pads within the gate structure 38, and sized to create thinned, back-illuminated, solid state image sensors 10.

Method of fabricating high quantum efficiency solid state sensors

A standard thick silicon charge-coupled device (FIG. 1A) has its pixel face mounted to a transparent, optically flat glass substrate using a thin layer of thermoset epoxy. The backside silicon of the charge-coupled device is thinned to 10 .+-.0.5 um using a two-step chemi-mechanical process. The bulk silicon is thinned to 75 um with a 700 micro-grit aluminium oxide abrasive and is then thinned and polished to 10 um using 80 nm grit colloidal silica. Access from the backside to the aluminum bonding pads (36 of FIG. 5) of the device is achieved by photolithographic patterning and reactive ion etching of the silicon above the bonding pads. The charge-coupled device is then packaged and wire-bonded in a structure which offers support for the silicon membrane and allows for unobstructed backside illumination.

Method for making thinned charge-coupled devices

A charge-coupled imaging device (FIG. 3) is thinned to allow for backside illumination. The device is further enhanced using ion implantation techniques to establish an electrical field (44) at the back surface, which functions to drive free electrons to potential wells generated beneath a gate structure (40) on the front surface. The device structure allows for both front side and backside illumination and is useful as an imaging device in applications where it is necessary to combine images from two different optical sources. The imaging device is particularly useful in terrestrial guidance systems (FIG. 5) where the imaging device is used to detect guide stars from a large guide star field. In such systems, the imaging device must be translated within an X-Y plane in order to cover the entire guide star field. In order to accurately know the position of the imaging device, optical fiducial marks are imaged onto a side of the imaging device opposite the side receiving the guide star photons. Using the two-sided imaging device allows for the elimination of optical elements necessary for combining the optical signals, particular the use of beam splitters.

Two-sided solid-state imaging device

A semiconductor chip having bond pads formed on a peripheral ledge recessed below the active chip surface. Ultrasonic wire bonds are made with the pads to lie below the active chip surface.

Semiconductor chip with recessed bond pads

The present invention is directed to a new and improved combination operative with an image acquisition system wherein a field-of-view is panned over a fixed image format; said combination comprising a sensor, an optical system for imaging the field-of-view at the sensor, said sensor including four linear arrays disposed in quadrilateral configuration, two of said arrays being applied to each half of a beam splitter cube; row and column buffers which are continuously updated every integration period, and a controller which strobes the buffers into a frame store memory after one resolution element width or pixel has been traversed.

Image acquisition system

Pattern noise in the output signal produced by an array of solid state light responsive elements is reduced by adjusting the responses of a subset of elements towards an average element response, thereby reducing the standard deviation of the element response distribution. The elements receiving response adjustments have responses in the upper and lower extremes of the element response distribution as determined by measuring the output of the sensor under controlled illumination conditions. A pattern noise reducing circuit includes: (1) means for deriving a set of response adjustment signals representing (a) the locations in the array of a subset of elements having responses in the upper and lower extremes of the element response distribution and (b) amounts of adjustment to the responses of said subset of elements to move said element responses toward an average response, and (2) means for applying to the signals representing the imagewise responses of said subset of elements, adjustments corresponding to said response adjustment signals, to produce imagewise output signals having reduced pattern noise. According to a further feature of the invention, redundancy reducing coding (e.g. run length coding) is employed to code the locations of the adjusted elements in the memory, thereby reducing the required size of the memory.

Pattern noise reduction method and apparatus for solid state image

A solid state image sensing array has a plurality of imaging sensing elements comprising first and second charge coupled MOS capacitors and a floating gate FET. The floating gate of the FET is disposed beneath the electrode of the second capacitor. In operation, a potential well is formed under the first capacitor. When the element is exposed to radiation, photochargers are accumulated in the potential well. To readout the photocharge, the charge is shifted under the second capacitor, thereby modulating the conductivity of the floating gate FET to provide signal sensing and amplification at the image sensing element. After readout, the photocharge can be purged from the sensing element by removing the potential from both capacitors, or if nondestructive readout is desired, the photocharge can be shifted back under the first capacitor.

Growing community of inventors

Sandy Hook, CT, United States of America

Enrique Garcia