Societa Italiana Telecomunicazioni Siemens S.p.a.

Enrico Cicognani

Riccardo Caldarella

Alfonso Lamartina

Athos Antonini

A multiplicity of subscriber lines, originating at telephone stations equipped partly with dials and partly with keyboard-controlled multifrequency generators, are connected to pulse-responsive selection equipment by way of switching circuits which are under the control of respective key-signal detectors. Upon the operation of any multifrenquency generator, the latter emits a key signal which actuates the associated detector to switch that line to a conversion network wherein the incoming frequency combinations are translated into binary codes which are stored in a dynamic memory whence they are read out into an available binary/decimal converter. The stored binary codes are accompanied by a line address which enables a coupler to reinsert the selection signals, in the form of digital pulse trains, into the correct line with the aid of an associated interface unit. The selection signals from the subscriber lines and the outputs of the binary/decimal converters are sampled at different rates consistent with the respective numbers of lines and converters. A separate stage in the coupler enables the transmission of data over a line by means of its keyboard upon actuation of an extradigital pushbutton producing a special code.

Telecommunication system having means for converting multifrequency

A network for the temporary storage of binary code words, such as calling digits accompanied by line-identification signals in a telecommunication system, includes a multistage shift register together with a one-stage buffer register and a one-stage extraction register, each stage accommodating a multiplicity of calling and identification bits together with a discriminating bit indicating the availability or non-availability of an outgoing channel to which the accompanying code word is to be transmitted. The three registers are cascaded in a loop for continuous recirculation in a recurrent cycle of z time slots, z being the number of register stages (514 in the specific example given), of the code words accompanied by availability bits; the code words are read out from the loop between the extraction and buffer registers. The beginning of a cycle is marked by a heading in the form of a pair of complementary special code words in immediate succession, periodically generated in the output of the buffer register; the occurrence of the first one gives rise to a start pulse while the second one generates a verification pulse. A monitoring circuit determines from the occurrence or nonoccurrence of these pulses whether the network operates correctly. The start pulse establishes an interval during which all code words pass through the extraction register until the appearance of an availability bit initiates the read-out of the associated code word; the extraction register is then short-circuited until the start signal recurs. Incoming code words stored in a set of input registers are sequentially entered in vacated time slots occurring, as a result of the reinsertion of the extraction register by the start pulse, at the very end of each cycle in which a code word is read out.

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Milan, Italy

Enrico Cicognani