Wolfspeed, Inc.

Macom Technology Solutions Holdings, Inc.

Eng Wah Woo

Alexander Komposch

Soon Lee Liew

Kok Meng Kam

Haedong Jang

Qianli Mu

Dan Namishia

Kun Wang

Erwin Cohen

Mitch Flowers

Samantha Cheang

Marvin Mabell

A semiconductor device package includes an interconnect structure with a first surface having at least one die thereon and a second surface that is opposite the first surface and is configured to be coupled to an external device. A protective structure on the first surface of the interconnect structure exposes a heat dissipating surface facing away from the interconnect structure in one or more directions. Related devices and fabrication methods are also discussed.

Semiconductor device packages with exposed heat dissipating surfaces and methods of fabricating the same

A leadframe blank includes a first package blank, a second package blank and a tie bar between the first package blank and the second package blank. The tie bar includes a recessed cavity therein.

Packaged semiconductor devices with leadframes having tie bar with recessed cavity

A semiconductor chip comprises a substrate, a die attach material, and a die. The substrate comprises an upper surface and a lower surface opposing the upper surface. The die attach material is on the upper surface of the substrate. The die comprises a bottom surface bonded to the upper surface of the substrate by the die attach material, a top surface opposing the bottom surface, and a side wall adjacent to the top surface and the bottom surface. A shortest distance across an exterior of the side wall from the bottom surface to the top surface defines an exterior surface distance. The die further comprises a die height measured from where the side wall meets the bottom surface to where the side wall meets the top surface. The exterior surface distance is longer than the die height.

Limiting failures caused by dendrite growth on semiconductor chips

A package mold according to some embodiments includes a first mold body and a second mold body, a mold cavity in the first mold body, a gate in a first side of the mold cavity for supplying liquid mold compound into the mold cavity, a longitudinal vent for releasing gas from the mold cavity in a second side of the mold cavity opposite the first side of the mold cavity, and a transverse vent for releasing gas from the mold cavity in a third side of the mold cavity that extends between the first and second sides of the mold cavity. Methods of packaging an electronic device using the package mold and resulting packaged devices are also disclosed.

Packaged semiconductor devices, and package molds for forming packaged semiconductor devices

A method of forming a packaged semiconductor device according to some embodiments includes providing a leadframe blank including a first package blank, a second package blank and a tie bar between the first package blank and the second package blank, forming a recessed cavity in the tie bar, and separating the first and second package blanks by sawing through the leadframe blank along the tie bar.

Methods of forming packaged semiconductor devices and leadframes for semiconductor device packages

A transistor package that includes a metal submount; a transistor die mounted on said metal submount; a surface mount IPD component that includes a dielectric substrate; and the dielectric substrate mounted on said metal submount. Additionally, the dielectric substrate includes one of the following: an irregular shape, a non-square shape, and a nonrectangular shape.

Integrated passive device (IPD) components and a package and processes implementing the same

A radio frequency (RF) transistor amplifier package includes a submount, and first and second leads extending from a first side of the submount. The first and second leads are configured to provide RF signal connections to one or more transistor dies on a surface of the submount. At least one rivet is attached to the surface of the submount between the first and second leads on the first side. One or more corners of the first side of the submount may be free of rivets. Related devices and associated RF leads and non-RF leads are also discussed.

Growing community of inventors

Ipoh, Malaysia

Eng Wah Woo