Chunghwa Picture Tubes, Ltd.

En-Chih Liu

Yen-Yu Huang

Chi-Chung Tsai

Ying-Hui Chen

Yi-Kai Chen

Yu-Hsien Chen

Ya-Ju Lu

Shin-Chuan Chiang

A display panel including a pixel array and a gate driver circuit is provided. The pixel array has a plurality of pixels. The gate driver circuit is used for providing a plurality of gate signals to the pixels and includes a plurality of shift registers and a plurality of demultiplexers. The shift registers respectively receive a first gate signal of the gate signals and a first clock signal of a plurality of clock signals to respectively provide a first control signal and a second control signal. The demultiplexers respectively receive a plurality of second clock signals of the clock signals, respectively turn-on according to the first control signal provided by the corresponding one of the shift registers, and respectively cut-off according to the second control signal provided by the corresponding one of the shift registers.

Display panel

A gate driving circuit is provided. The gate driving circuit includes a plurality of gate driving units sequentially coupled to each other. Each of the gate driving units includes a shift register and a de-multiplexer. The shift register receives a start pulse signal, and generates a first control signal and a second control signal according to the start pulse signal and a scan controlling signal, where when the shift register converts the first control signal into the second control signal, the shift register pulls down a voltage level of the first control signal according to the second control signal. The de-multiplexer receives a part of a plurality of clock signals for generating a plurality of gate signals sequentially according to the first control signal, where the clock signals are enabled sequentially, and enable periods of two sequential clock signals are partially overlapped with each other.

Gate driving circuit

The thin film transistor includes a gate, a gate insulating layer, a semiconductor layer, and a source and a drain. The gate insulating layer covers the gate. The semiconductor layer is located on the gate insulating layer which is disposed above the gate. The source and the drain are disposed above the gate insulating layer and are electrically connected to the semiconductor layer, respectively. The source and the drain are respectively located in different layers. A first contact resistance is existed between the semiconductor layer and the source, a second contact resistance is existed between the semiconductor layer and the drain, and. the first contact resistance is less than the second contact resistance.

Thin film transistor

A thin film transistor including a gate, a channel, a stopper layer, a source and a drain is provided. The channel and the gate are overlapped. The stopper layer covers a portion of the channel and has a ring-shape hole exposing two opposite connecting portions of the channel. A portion of the stopper layer is disposed between the source and the channel and between the drain and the channel. The source and the drain are filled in the ring-shape hole of the stopper layer and electrically connected to the connecting portions of the channel. Moreover, a pixel structure including the thin film transistor is provided.

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Taoyuan, Taiwan

En-Chih Liu