Murata Manufacturing Co., Ltd.

Emmanuel Lefeuvre

Stéphane Bouvier

Frédéric Voiron

Nicolas Normand

David Denis

A current path is provided through an interposer to ground a grounding pattern associated with a transmission line, by exploiting an interposer substrate that has a high-resistivity portion at a first surface and a low-resistivity portion extending from the high-resistivity portion to a second surface of the interposer. Moreover, a set of blind via-holes comprising electrically-conductive material extend from the first surface of the interposer substrate through the high-resistivity portion and into the low-resistivity portion. Top-to-bottom connection can be made using the conductive material in the blind vias and using the low-resistivity portion of the substrate, while the high-resistivity portion of the substrate impedes current leakage from the transmission line to the second surface of the substrate. The number and dimensions of the blind via-holes control the impedance of the grounding pattern relative to the transmission line's characteristic impedance.

Through-interposer grounding using blind vias

An electronic device and a method for manufacturing an electronic device. The electronic device includes: a board equipped with a pair of differential transmission lines, each line of the pair having an opening extending between two line terminals; and a capacitor module that includes: a base; and two 3D capacitors supported by the base, each 3D capacitor comprising two capacitor terminals respectively connected to the two line terminals of one line of the pair of transmission lines.

Electronic device with differential transmission lines equipped with capacitors supported by a base, and corresponding manufacturing method

An electrical device that includes a substrate; a 3D capacitor including a capacitor dielectric region of a dielectric material, a capacitor electrode region of a conductive material, the capacitor dielectric region and the capacitor electrode region being arranged at least partially inside a cavity extending in the substrate from a top face of the substrate; and a surrounding through opening in the substrate and which surrounds a surrounded substrate region, the 3D capacitor being outside of the surrounded substrate region, the surrounding through opening extending from the top face to a bottom face of the substrate, wherein inside the surrounding through opening a surrounding dielectric region of the dielectric material and a surrounding conductive region of the conductive material are arranged.

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Caen, France

Emmanuel Lefeuvre