STMicroelectronics

Emmanuel Bechet

Bertrand Borot

An integrated circuit includes N configurable cells each including one functional input, one output, one propagation input and one output. The circuit includes a functional mode in which the N configurable cells are coupled by their functional input and their output to logic blocks with which they cooperate to form at least one logic circuit. The disclosed circuit also includes a test mode in which the N configurable cells are coupled by their propagation input and their output to the logic blocks and in which the output of the Nth configurable cell is coupled to a functional input of the first logic block to form an oscillator.

Integrated circuit, system and method including a performance test mode

A memory includes a plurality of memory cells each including a true data input connected to a true bit line and complementary data input connected to a complementary bit line, and two inverters connected head-to-tail firstly to the true data input and secondly to the complementary data input. The memory also includes a test circuit includes a plurality of test cells, each test cell includes a true data input connected to a complementary data input of the preceding test cell and a complementary data input connected to the true data input of the following test cell, the complementary data input of the last test cell being connected to the true data input of the first test cell, each test cell comprising a first inverter connected between the true data input and the complementary data input. The looped chain thus formed propagates a signal whose period is a function of the performance of the storage cells.

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Grenoble, France

Emmanuel Bechet