Fairchild Semiconductor Corporation

Emma Wang

WeiMing Sun

Lei Huang

Peng Zhu

Ming Chuen Alvan Lam

Shawn Barden

Jianli Chen

Tony Cheng Han Lee

Ricky Li

Systems and methods are disclosed, including a USB interface detector, a detection method, a USB connector, and an electronic device. The detection method may be applicable to the USB connector mounted in the electronic device. According to an operation mode of the electronic device, a first pin and a second pin in the USB interface can be pulled up or pulled down. After the pull up or the pull down, a voltage change at the first and second pins are detected. If the voltage changes cross a reference voltage, an instruction related to attachment or detachment with a second device can be provided.

USB interface detector

The disclosure provides a button-press detection and filtering method, related circuit, and button-press detection chip for a external device. A button-press signal from a wire control apparatus is coupled to the button-press detection chip for the external device. The button-press detection chip for the external device can digitally sample the button-press signal through the filter circuit and outputs a digital logic signal corresponding to a button to an audio codec according to the sampling result. The audio codec can determine a pressed button according to the digital logic signal and performs a corresponding function. With the solutions of the disclosure, a noise interference signal in a button-press signal may be avoided and a pressed button may be accurately detected, without using a dedicated chip or complex software codes in a wire control apparatus and an electronic device.

Button-press detection and filtering

A delay time adjusting circuit is described, in which a reference signal circuit generates at least one reference signal to an A/D conversion circuit, an input signal circuit generates an input signal to the A/D conversion circuit, the A/D conversion circuit compares the input signal with the at least one reference signal to output a digital signal to a digital logic chip, and the digital logic chip determines a delay time based on the digital signal. In this way, the delay time can be determined digitally, and an adjusting accuracy of the delay time can be increased; and also, the delay time can be adjusted through changing the level of the input signal, thus reducing circuit losses and costs.

Delay time adjusting circuit, method, and integrated circuit

This document discusses, among other things, a delay circuit, in which a first register is written with a delay reference code, a second register is written with a delay factor, a control unit determines a corresponding delay ratio in a storage unit based on the delay factor in the second register, and sends the determined delay ratio to a first digital timing unit, the first digital timing unit determines a delay reference time based on the delay reference code in the first register, multiplies the delay reference time by the delay ratio to result in a desired delay time, and generates a delay.

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Beijing, China

Emma Wang