Qualcomm Incorporated

Emanuele Lopelli

Magnus Olov Wiklund

Salvatore Pennisi

Cheng-Han Wang

Yi Zeng

Charles Chang-I Wang

Liang Zhao

Le Nguyen Luong

Shervin Moloudi

Richard McConnell

Koorosh Akhavan

Mahbod Mofidi

Chan Hong Park

Charles Wang

Aspects described herein include devices and methods for smart ultra wideband transmissions. In one aspect, an apparatus includes pulse generation circuitry configured to output a plurality of transmission (TX) pulse samples at a selected signal sample rate, where each pulse sample of the plurality of TX pulse samples comprises a value associated with a pulse amplitude at a corresponding sample time The apparatus includes a plurality of power amplifier (PA) cells, with each PA cell of the plurality of PA cells comprising a corresponding current source and associated gates, and where the associated gates of a PA cell are selectable to configure an on state and an off state. Logic circuitry of the apparatus is configured to set the on state or the off state for each PA cell.

Ultra wideband transmitter

Apparatus and methods for generating multiple oscillating signals. An example circuit generally includes a first voltage-controlled oscillator (VCO) circuit and a second VCO circuit having a differential bias input coupled to a differential output of the first VCO circuit. At least one of the first VCO circuit or the second VCO circuit generally includes: a pair of cross-coupled transistors comprising a first transistor and a second transistor, a first inductive element coupled between a first node and the drain of the first transistor, a second inductive element coupled between the first node and the drain of the second transistor, a third transistor having a drain coupled to the drain of the first transistor and having a source coupled to a second node, and a fourth transistor having a drain coupled to the drain of the second transistor and having a source coupled to the second node.

Quadrature voltage-controlled oscillator (QVCO) with improved phase noise and quadrature imbalance trade-off

Examples herein disclose apparatus and systems for hybrid vector based polar modulator schemes that may use a series of polar modulators to create a system of vector modulators. The resulting polar response may be de-composed into the sum of the polar modulators. This approach allows accurate phase modulation in two such links without the need for high resolution AM part to cover the IQ plane of a QAM modulator.

Apparatus and methods for hybrid vector based polar modulator

In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may receive an otw signal that is associated with low-path pass information and transmission data. The apparatus may apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator. The apparatus may determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function.

Apparatus and method for an all-digital phase lock loop

Methods, systems, and devices for wireless communications are described. The method may include identifying phase information generated from modulation information, mapping the phase information by mapping a second phase point located in a second quadrant to a first phase point of a first quadrant, where the first phase point may be associated with a phase trajectory of the phase information, synthesizing the mapped phase information associated with the phase trajectory based on mapping the phase information, rotating the phase trajectory based on a phase-plane rotation value associated with mapping the phase information, and generating a modulated signal associated with a carrier frequency based on mapping the phase information and rotating the phase trajectory.

Hybrid polar modulator

An example phase-locked loop (PLL) includes a digital filter, an oscillator, and a time-to-digital converter (TDC). The digital filter is configured to sample at a discrete time that is responsive to a reference clock signal received at the digital filter. The oscillator is coupled to the digital filter and configured to generate an output signal of the PLL. The TDC is coupled to the oscillator to determine a phase difference between the output signal and the reference clock signal. The TDC also provides a time signal to the digital filter that is based on the phase difference and is representative of an instantaneous rate of operation of the PLL. The digital filter is further configured to adjust a response characteristic of the digital filter according to the time signal.

Dynamic adjustment of a response characteristic of a phase-locked loop digital filter

Aspects of the present disclosure are generally directed to techniques and apparatus for estimating a gain of a VCO in a PLL. In certain aspects, the technique includes calculating a C-V characteristic of a varactor matched to another varactor in the VCO. The technique also includes estimating the gain of the VCO based on the C-V characteristic of the varactor, a tank inductance of the VCO, and an output frequency of the VCO. Aspects of the present disclosure allow for estimating the gain of the VCO while the PLL remains in operation.

Growing community of inventors

Laguna Niguel, CA, United States of America

Emanuele Lopelli