Honeywell International Inc.

Honeywell G.m.b.h.

Elliott H Rachlin

Ananthapadmanabha Krishnamurthy

Ziad M Kaakani

Paul Francis McLaughlin

James Michael Schreder

Jethro F Steinman

Pratap Parashuram

Joseph Pradeep Felix

Jay William Gustin

Jason Thomas Urso

Donald W Moore

David Lyle Kirk

David J Dopilka

Ronald J Freimark

Laurence A Clawson

Michael James Waynick

Vivek B Varma

Shylaja Munihanumaiah

Michael L Hodge

Keijo Manninen

Ronald Quinn

Robert A Blaser

Piyush Garyali

William L Call

Gordon Aaseng

Dave Dopilka

Paul S Connolly

Paul McGaugh

Steven C Ramsdell

Ed Kabbas

Mike Boender

A method of process control in a PCS. The PCS provides host controllers coupled together, I/O devices, field devices, and processing equipment, configured together to run a process, the plurality of host controllers having stored a single online orchestrator program for coordinating a shared and synchronized database for the host controllers, wherein the online orchestrator program uses and tracks currently available host controllers and selected control programs for controlling the process. The PCS also includes an offline orchestrator. The orchestrator is run on the currently available host controllers that shares and synchronizes the initial shared database version to the currently available host controllers. A selected host controller responsive to an event broadcasts updated shared database version to the currently available host controllers. The offline orchestrator accepts commands relating to a deployment/undeployment of control program(s) among the currently running host controllers in response to changing requirement(s) by the control programs or an outside environment.

Coordinating a single program running on multiple host controllers

One embodiment is a first computing system configured to control a second computing system, a software module configured to attempt to interact with the second computing system once the second computing system is brought to a first state by the first computing system, and an admittance mechanism configured to determine if the interaction is allowed to occur.

Admittance mechanism

A process control system includes first type and second type controllers having different hardware architectures coupled together by a redundancy network for providing a controller pool. Primary application modules (AMs) are coupled to the controller platforms by a plant-wide network. The controller platforms are coupled by an input/output (I/O) mesh network to I/O devices to provide an I/O pool coupled to field devices coupled to processing equipment. A translating device translates states and values from one of the primary AMs running on a first type controller to generate a backup AM having an instruction set compatible with the second type controller. A controller application module orchestrator (CAMO) extends synchronization to the second type controller, makes the backup AM available to the second type controller, and then switches to utilize the second type controller as an active controller running the process.

Process control system with different hardware architecture controller backup

A method of modeling dynamic system performance includes enabling a user to create a user-defined static behavior model of a user-defined system of computers, networks and/or bridges. A library of blocks is provided that each represent a computer, a network and/or a bridge for the user to use in defining a user-defined static behavior model, at least some of the blocks in the library of blocks may include one or more block parameters that are user definable. The static behavior model is automatically converted into a dynamic behavior model that is compatible with a simulator and is read into the simulator. A plurality of Monte-Carlo simulations are run on the dynamic behavior model to produce a plurality of simulation outputs, which are analyzed and the analyzed results are outputted.

Determining dynamic system performance from a static behavior model

A method includes emulating an Enhanced Application Module Redundancy (EAM-R) system that includes a primary EAM-R board and a secondary EAM-R board. Emulating the EAM-R system includes detecting that data received from a sensor has been written to a memory block associated with the primary EAM-R board, and sending instructions to a secondary computing device to write a copy of the data to a same memory block in the secondary computing device that is associated with the secondary EAM-R board. The EAM-R system is emulated in an emulation system that includes at least one network connection. The emulation system does not include a physical primary EAM-R board or a physical secondary EAM-R board.

System and method for emulation of enhanced application module redundancy (EAM-R)

An apparatus includes a computing architecture having multiple memories including a first memory and a second memory. The multiple memories are configured to store multiple copies of a memory image including a first copy and a second copy, where the memory image contains instructions to be executed by the computing architecture and data to be used by the computing architecture. The computing architecture can be configured to perform multiple functions including a first function and a second function. The first memory can be positioned in the computing architecture so that the first copy of the memory image is located in a first position that is more efficient for the first function. The second memory can be positioned in the computing architecture so that the second copy of the memory image is located in a second position that is more efficient for the second function.

Replication of memory image for efficient simultaneous uses

A method includes translating at least one application source code file associated with a legacy controller in a distributed control system to instructions executable by a controller simulation computing device, wherein the legacy controller is associated with a legacy operating system and the controller simulation computing device is associated with a second operating system different from the legacy operating system. The method also includes simulating operation of the legacy controller using the instructions and an emulation of the legacy operating system in the controller simulation computing device. The method further includes determining configuration data for the legacy controller during the simulated operation of the legacy controller. In addition, the method includes saving the configuration data to a configuration data file.

System and method for legacy level 1 controller virtualization

A method includes using processing circuitry and at least one memory configured to store a plurality of threads. The method includes providing an environment associated with an operating system to execute one or more threads of the plurality of threads. The environment includes a plurality of virtual priorities and a plurality of actual priorities. Each of the plurality of threads is allowed to select a virtual priority of the plurality of virtual priorities. The method also includes associating an actual priority of the plurality of actual priorities to one of the plurality of threads based on the plurality of virtual priorities assigned to the plurality of threads. The method also includes executing the one of the plurality of threads associated with the actual priority.

Apparatus and method for managing a plurality of threads in an operating system

A method includes detecting, by a Local Control Network (LCN) Monitor, a transmission of a data packet from a first device to at least one second device over the LCN. The LCN Monitor is not a source or destination of the data packet. The method also includes obtaining, by the LCN Monitor, a copy of the transmitted data packet. The method further includes decoding, by the LCN Monitor, the obtained data packet. In addition, the method includes storing, by the LCN Monitor, the decoded data packet in a storage device.

System and method for capturing and displaying packets and other messages in local control network (LCN)

A method includes receiving at least one source code file associated with a legacy hardware platform, the at least one source code file being part of a software migration from the legacy hardware platform to a target hardware platform. The method also includes identifying one or more absolute memory addresses of the legacy hardware platform included in the at least one source code file. The method further includes for each of the one or more absolute memory addresses, including an address remapping function in an assembly language instruction block associated with the target hardware platform.

System and method for facilitating dynamic remapping of absolute addresses during software migration

A method includes receiving a message having a message header at a network node, where the message header includes a source address field. The method also includes determining whether the message has been previously received at the network node using one or more bits of the source address field. The method further includes, upon a determination that the message has not been previously received at the network node, setting the one or more bits of the source address field to a specified value indicating that the message has been received at the network node. The one or more bits in the source address field are used in a manner that is contrary to original device specifications.

System and method for enabling detection of messages having previously transited network devices in support of loop detection

A method includes transmitting, by a first processing device, a signal to a second relay processing device. The signal includes a message for the second relay processing device to transmit a read command and/or a write command to an I/O device that is not accessible by the first processing device. The method also includes receiving, by the first processing device, an indication that the second relay processing device has transmitted the read command and/or the write command to the I/O device.

Relay mechanism to facilitate processor communication with inaccessible input/output (I/O) device

A method and system to evaluate stare-time of a selected target by a pointing system is provided. In an embodiment, the method includes specifying a time period for evaluation. A processor simulates movement of selected celestial bodies during the time period and movement of the platform during the time period. The processor further simulates pointing the pointing system in each celestial direction during the time period. The method calculates stare-time in each celestial direction uninterrupted by the selected celestial bodies and the platform during the time period.

Method and system for evaluating stare-time by a pointing system

An impact assessment system and method for determining emerging criticality in a complex system is provided. The impact assessment system includes a component dependency model and an emergent criticality analyzer. The component dependency model describes the relationships between components in the system and their underlying dependency and criticality relationships. The impact assessment system receives component failure data from the complex system and uses the component dependency model and emergent criticality analyzer to determine the impact of the component failure on the criticality of remaining components in the system. The impact assessment system is thus able to determine how component failures in the complex system can impact the criticality of remaining components in the complex system and thus can assist in determining how those components may or may not be safely used in further operational activities.

Impact assessment system and method for determining emergent criticality

A method includes executing one or more applications in a deterministic execution environment and executing a plurality of background tasks in the deterministic execution environment. The one or more applications and the background tasks are executed in different time slots. At least one of the background tasks cannot be completed within a single time slot. The at least one of the background task is executed incrementally in multiple non-adjacent time slots so as to prevent the at least one background task from interfering with the execution of the one or more applications.

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Scottsdale, AZ, United States of America

Elliott H Rachlin