Lsi Corporation

Elliot Sowadsky

Ho-Ming Leung

Peter G Panagas

Suryanaryana M Potharaju

Eric Hung

Kasturiranga Rangam

A method for transitioning a video system is disclosed. The method generally includes a first step for (A) executing in a processing circuit a standby code stored in a nonvolatile memory while the video system is in an off state, the off state defining a low power configuration for the processing circuit and a power off condition for the video system, the standby code being responsive to a plurality of wake up conditions to wake up the video system. In a second step, the method may (B) store an application code in a volatile memory while in the off state, the application code configured to operate the video system while in an on state of the video system. The method generally includes a third step for (C) transitioning from the off state to the on state upon detection of at least one of the wake up conditions. A step for (D) executing in the processing circuit the application code while in the on state to decode video may also exist in the method.

DVD recorder and PVR instant on architecture

An apparatus comprising a video decoder, a video memory and a global motion circuit. The video decoder may be configured to generate a decoded video signal in response to a coded video signal. The video memory may be connected to the video decoder. The global motion circuit may be configured within the video decoder circuit. The global motion circuit may be configured to (i) receive one or more warp points and (ii) generate one or more warping addresses presented directly to the video memory.

Method and/or apparatus for implementing global motion compensation in a video system

An apparatus comprising a phase lock loop circuit and a control circuit. The phase lock loop circuit configured to generate an output signal having a first frequency in response to (i) an input signal having a second frequency, (ii) a first divider value and (iii) a second divider value. The second divider value may control spread spectrum modulation of the phase lock loop circuit. The control circuit configured to generate the second divider value in response to (i) the output signal and (ii) a programmable control signal.

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San Jose, CA, United States of America

Elliot Sowadsky