Unity Semiconductor Corporation

Rambus Inc.

Elizabeth Friend

Lidia Vereen

Bruce Lynn Bateman

David A Eggleston

Louis C Parrillo

Christophe J Chevallier

Deepak Chandra Sekar

Gary Bela Bronner

Philip F S Swab

Mehmet Gunhan Ertosun

A memory device includes an array of resistive memory cells. Each resistive memory cell in the array includes a first resistive memory element, a second resistive memory element, and a two-terminal switching element. The first resistive memory element is electrically coupled to the second resistive memory element and to the switching element at a common node.

1D-2R memory architecture

In an example, a single damascene structure is formed by, for example, providing a dielectric layer, forming a void in the dielectric layer, and forming a portion of a first two-terminal resistive memory cell and a portion of a second two-terminal resistive memory cell within the void. The portions of the two-terminal resistive memory cells may be vertically stacked within the void.

Planar resistive memory integration

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Sunnyvale, CA, United States of America

Elizabeth Friend