Hewlett-Packard Development Company, L.p.

Elizabeth Anne Richard

John Edward Larson

Robert A Lester

A transaction generator generates memory transactions identical to processor memory transactions to initialize, rebuild, and verify memory added or replaced during operation of a computer system configured for RAID memory. The transactions read and rewrite the correct value for replaced memory and write a known good value for added memory. Memory writes are verified by a read after the write transaction. The transaction generator is a state machine. A first counter is used for holding memory addresses of the transactions, automatically incrementing after each transaction. A second counter can throttle the generation of transactions by controlling the incrementation speed of the first counter. Transactions generated by the transaction generator have a transaction identifier, selected from a pool of available transaction identifiers. The transactions can complete out of order.

Transaction generator for initialization, rebuild, and verify of memory

A mechanism for executing requests in a system. More specifically, a technique for processing requests to a memory system is provided. A shift register may be used to store an index associated with requests, such as read and write requests, to a memory system. Each request is stored in a respective queue depending on the source of the request and the request type (e.g. read or write). Each request includes flags which may be set to determine the processing order of the requests, such that out-of-order processing is feasible. An index corresponding to each of the requests is stored in an index shifter to facilitate the out-of-order processing of the requests. Alternatively, a shift register may be used to store each of the requests. Rather than shifting the indices to facilitate the out-of-order processing of requests, depending on the state of the corresponding request flags, the entire entry may be shifted.

Techniques for processing out-of-order requests in a processor-based system

A technique for selecting events associated with a hot-plug operation. More specifically, a programmable configuration register may be used to provide a mechanism for periodically scheduling requests associated with a hot-plug operation, such as initialization, rebuild, and verify requests. An arbiter is provided to facilitate an ordered access to a memory system. A user can select a periodic interval such that hot-plug requests are periodically executed during the execution of normal requests through the arbiter. The user-selectable interval may be dependent on the specific application of the system and the importance of operating in a redundant mode.

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Houston, TX, United States of America

Elizabeth Anne Richard