Motorola Corporation

Eliezer Sand

Vladimir Koifman

Yachin Afek

Kiyoshi Kase

Michael Zarubinsky

In a circuit (200), a differential pair (217/227) of transistors (210 and 220) receives a differential input signal (X.sub.1 -X.sub.2) from input terminals (211 and 221) and provides a differential output signal (Y.sub.1 -Y.sub.2) to output lines (215 and 225). The differential pair (217/227) is powered from a common constant current source (290) at a common node (205). Nonlinearities, such as cubic terms in a transfer function H=(Y.sub.1 -Y.sub.2)/(X.sub.1 -X.sub.2) caused by the transistors are compensated by compensation circuits (237 and 247). The compensation circuits (237 and 247) are coupled between the node (205) and the output lines (215 and 225). The compensation circuits (237 and 247) are controlled by the input signal (X.sub.1 -X.sub.2) and drain current from the node (205). Thereby, the currents going into the transistors (210 and 220) and the transistors gains (Y.sub.1 /X.sub.1 and Y.sub.2 /X.sub.2) are modified, so that nonlinearities are substantially canceled.

Circuit compensating nonlinearities

A rational decimation circuit (200) has an integration filter (210) and an FIR-filter (220). The integration filter (210) has N serially arranged integrator blocks (230-n) and an interpolator block (250). The FIR-filter (220) has K filter channels (260-k) and a commutator (290) which are controlled by a control block (300). Each channel (260-k) has a multiplier unit (270-k) and an accumulator unit (280-k). The integration filter (210) has a transfer function with N-fold poles and the FIR-filter (220) has a transfer function with zeros which cancel the poles. FIR-coefficients h.sub.k (T.sub.V) in the FIR-filter (220) are related to the F.sub.V /F.sub.X ratio of the interpolator block (250) and to the number N of integrator blocks (230-n). A method is also described.

Apparatus and method for sampling rate conversion with rational factors

The rise time of a voltage Vo presented to a load, based on an input voltage Vi provided via an RC filter coupled to the load for removing higher frequency noise on Vo, is substantially reduced by providing a sensor circuit with differential inputs Vi, Vo. The sensor circuit drives a charger circuit coupled to a DC potential and the load so that rapid charging of C to Vo does not depend on R. As Vo approaches Vi, the sensor circuit deactivates the charger circuit to stop further charging and a latch coupled to the sensor circuit shuts off the sensor circuit to reduce power consumption while (Vo.about.Vi)&gt;0. A current mirror buffer is desirably included between the sensor output and the latch for level shifting.

Growing community of inventors

Hod Hasharon, Israel

Eliezer Sand