Texas Instruments Corporation

Elida Isabel De Obaldia

Dirk Leipold

Robert Bogdan Staszewski

Oren E Eliezer

Ran Katz

Chih-Ming Hung

An on-chip receiver sensitivity test mechanism for use in an integrated RF transmitter wherein the transmitter and the receiver share the same oscillator. The mechanism obviates the need to use expensive RF signal generator test equipment with built-in modulation capability and instead permits the use of very low cost external RF test equipment. The invention utilizes circuitry already existing in the transceiver, namely the modulation circuitry and local oscillators to perform sensitivity testing. The on-chip LO is used to generate the modulated test signal that otherwise would need to be provided by expensive external RF test equipment with modulation capability. The modulated LO signal is mixed with an externally generated unmodulated CW RF signal to generate a modulated signal at IF which is subsequently processed by the remainder of the receiver chain. The recovered data bits are compared using an on-chip BER meter or counter and a BER reading is generated. The BER reading is used either externally or by an on-chip processor or controller to establish a pass/fail indication for the chip.

On-chip receiver sensitivity test mechanism

A novel method and apparatus for defining process variation in a digital RF processor (DRP). The invention is well suited for use in highly integrated system on a chip (SoC) radio solutions that incorporate a very large amount of digital logic circuitry. The method and apparatus provide direct measurement of fabrication process variation in circuits without requiring any additional test equipment by utilizing a time to digital converter (TDC) circuit already present in the chip. The TDC circuit relies on the time delay in an inverter chain to sample a high speed CKV clock using a slow FREF clock. Calculation of inverse time provides a direct correlation for fabrication process variation in each die.

Method of defining semiconductor fabrication process utilizing transistor inverter delay period

An on-chip receiver sensitivity test mechanism for use in an integrated RF transmitter wherein the transmitter and the receiver share the same oscillator. The mechanism obviates the need to use expensive RF signal generator test equipment with built-in modulation capability and instead permits the use of very low cost external RF test equipment. The invention utilizes circuitry already existing in the transceiver, namely the modulation circuitry and local oscillator, to perform sensitivity testing. The on-chip LO is used to generate the modulated test signal that otherwise would need to be provided by expensive external RF test equipment with modulation capability. The modulated LO signal is mixed with an externally generated unmodulated CW RF signal to generate a modulated signal at IF which is subsequently processed by the remainder of the receiver chain. The recovered data bits are compared using an on-chip BER meter or counter and a BER reading is generated. The BER reading is used either externally or by an on-chip processor or controller to establish a pass/fail indication for the chip.

An on-chip test mechanism for transceiver power amplifier and oscillator frequency for use with the transmitter portion of an integrated RF transceiver. The RF output from the power amplifier in the transmitter is input to a built-in dedicated analog comparator having a configurable threshold. The threshold is adjusted to a predetermined level at which crossings start to occur at the comparator output. The comparator outputs pulses only if the power amplifier output is above a minimum configurable level. The comparator output is input to a frequency divider whose frequency output is tested by a low cost external tester to determine the actual RF frequency thereby confirming generation of the correct oscillator frequency and that the amplitude of the signal at the output of the power amplifier is sufficiently high for the configurable threshold level to be exceeded, thereby determining the compliance of the output power with its defined specifications.

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Dallas, TX, United States of America

Elida Isabel De Obaldia