Intel Corporation

Eli Elik Kupermann

Yuli Barcohen

Rajasekaran Andiappan

Elena Agranovsky

Michael Berger

Suryaprasad Kareenahalli

Tamir Damian Munafo

Dor Levy

Mukesh Kataria

Mazen G Gedeon

Joshua Resch

Nachum Barcohen

Elad Dabool

Uttam K Sengupta

Sanjay Bakshi

Michael N Derr

Jasmeet Chhabra

Mandar S Joshi

Nimrod Diamant

Yasser Rasheed

David Birnbaum

Jeffrey Tripp

Ariel Malamud

Hung Huynh

Fred H Bolay

Alexander Brill

Avraham Mualem

Yehiel Shilo

Zvi Vlodavsky

Gil Baruch

Yael Yanai

Marlon D Bada

Fred Bolay

Christian Soby

Amit Kimelman

Chen-Hsun Wu

Irena Riji

Jeffrey John Vick

A technical problem faced when remotely controlling or debugging electronic devices is that remote control or debugging often requires a direct connection. However, debugging ports are inaccessible on many devices. Technical solutions described herein provide systems and methods for secure communication via existing communication infrastructure (e.g., public instant messenger (IM)), providing various debugging abilities including debugging and file sharing. Technical solutions described herein also provide systems and methods for debugging based on remote device memory state collection and sending for embedded or IoT devices. This solution avoids a hardware debugging connection by using a debugging methodology resident on the device to read and dump the relevant memory, registers, and other device state information in a secure and automated manner.

Remote debugging and management

Embodiments of the present disclosure provide techniques for sensor testing for computing devices during initial movement of the device, such as movement on a manufacturing line. In one instance, a device with integral sensor testing during initial movement of the device may include a plurality of sensors and a sensor test block coupled with the plurality of sensors, to detect, collect and/or report readings provided by at least some of the sensors in response to movement of the device between at least a first test station and a second test station. Other embodiments may be described and/or claimed.

Testing of device sensors on a manufacturing line

Technologies for controlling timing calibration of a dedicated inter-integrated circuit data bus by a primary microcontroller are disclosed. The primary microcontroller performs a data transfer with a secondary integrated circuit using the dedicated inter-integrated circuit data bus, and determines a duration of the data transfer. If the duration is outside of an acceptable range, the primary microcontroller updates one or more data transfer timing parameters so that the duration of future data transfers are closer to the acceptable range.

Technologies for automatic timing calibration in an inter-integrated circuit data bus

In an embodiment, a processor includes first logic to determine first power to be provided to a first portion of a computational resource during a time period. The first portion may be reserved for execution by the processor of a first workload to be executed during the time period. The first power may be determined based at least in part on the first workload and independently of a second workload. The processor may include second logic to determine second power to be provided to a second portion of the computational resource during the time period. The second portion may be reserved for execution by the processor of the second workload during the time period. The second power may be determined based at least in part on the second workload and independently of the first workload.

Method and apparatus to manage power usage in a processor

Described is an apparatus comprising: a processor operable to execute a virtual machine manager (VMM) which is to manage a virtual machine (VM) for a hardware intellectual property (IP) block; a communication fabric; and a hardware IP block coupled to the processor via the communication fabric, wherein the hardware IP block is to be coupled to a first set of one or more sensors, and wherein the VM and the hardware IP block are operable to process data collected from the first set.

Low power sensing apparatus and method using a combination of virtual machine and dedicated hardware intellectual property IP block

In one embodiment, a processor comprises: at least one core to execute instructions; a memory coupled to the at least one core, the memory including a plurality of pages to store information; and a page manager coupled to the memory, the page manager to access metadata of a page table entry associated with a page of the memory and update usage information of an entry of a database, the entry of the database associated with the page of the memory. The page manager may cause at least a portion of the memory to be dynamically powered down based at least in part on the usage information. Other embodiments are described and claimed.

Dynamically controlling power management of an on-die memory of a processor

An apparatus, a system and a method for securing sensor data by a security engine circuitry of a system on chip (SoC). For example, the security engine may receive from a processor circuitry of the SoC an inter processor communication (IPC) request to secure sensor data, and may send to an integrated sensor hub (ISH) of the SoC an IPC request to receive sensor data. The ISH may collect sensor data from one or more internal and/or external sensors, and may send the collected sensor data to the security engine. The security engine may receive the collected sensor data from the ISH, may secure the collected sensor data, and may send secured sensor data to the processor circuitry.

Handling sensor data

A platform including a security system is described. The security system comprises, in one embodiment, a multi-state system having a plurality of modes, available whenever the platform has a source of power. The modes comprise an unarmed mode, in which the security system is not protecting the platform, an armed mode, in which the platform is protected, the armed mode reached from the unarmed mode, after an arming command, and a suspecting mode, in which the platform is suspecting theft, the suspecting mode reached from the armed mode, when a risk behavior is detected.

Always-available embedded theft reaction subsystem

Systems and methods may provide for implementing a dynamic payment service. In one example, the method may generate a request communication including purchase detail information relating to an item to request credit from a vendor to conduct a transaction relating to the item, determine a scope of credit to be issued to conduct the transaction relating to the item based on the purchase detail information, and generate a payment communication including the transaction information to complete the transaction relating to the item.

Dynamic payment service

A method, system, and computer program product containing instructions to provide hardware-based human presence detection. Rather than rely upon software to display a CAPTCHA image, hardware in the form of a sprite engine of a graphics device is used to write a random text string directly to the display device, overlaying the user interface provided by software. Because the sprite engine is isolated from a host operating system for the system, the random text string cannot be captured and processed by software robots running under the host operating system.

Hardware-based human presence detection

Various embodiments are directed to a tri-layered power scheme for architectures which contain a microcontroller. In one embodiment, a power management system may comprise a microcontroller in a chipset, a low consumption power well to control a power supply to the microcontroller, and a power controller to control a power supply to the low consumption power well. The power management system may be arranged to switch among multiple power consumption states. In a maximum power consumption state, the microcontroller is on, the power controller is on, and the low consumption power well is on. In an intermediate power consumption state, the microcontroller is off, the power controller is on, and the low consumption power well is required to be on. In a minimum power consumption state, the microcontroller is off, the power controller is on, and the low consumption power well is optionally on or off at the discretion of the power controller. Other embodiments are described and claimed.

Tri-layered power scheme for architectures which contain a micro-controller

According to some embodiments, network adapters may be used in remote management device key administration.

Remote management device key administration using network adapters

Growing community of inventors

Maale Adumim, Israel

Eli Elik Kupermann