Stmicroelectronics S.r.l.

Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno

Co. Ri. M.me--consorzio Per La Ricera Sulla Microelectronica Nel

Eleonora Franchi

Dario Bruno

Rinaldo Poluzzi

Biagio Giacalone

Roberto Antonio Canegallo

Luca Perugini

Vincenzo Matranga

Salvatore Valerio Cani

Luca Perilli

Nicol&ograve; Manaresi

A communication cell for an integrated circuit includes a physical interface configured to supply an input signal (for example, a capacitive signal or an ohmic signal). A receiver circuit operates to receive the capacitive signal and generate a first intermediate signal. A buffer circuit operates to receive the ohmic signal and generate a second intermediate signal. An output stage including a selector device (for example, a multiplexer) configured to receive the first and second intermediate signals and selectively pass only one of those signals to the integrated circuit based on operating condition. The input signal may further be an inductive signal, with the output stage further functioning to selectively pass that signal based on operating condition.

Communication cell for an integrated circuit operating in contact and contactless mode, electronic chip comprising the communication cell, electronic system including the chip, and test apparatus

The analog processor of this invention is programmable and capable of storing the processing coefficients in analog form. It comprises a storage section having at least one output, plural outputs in most cases, and being adapted to respectively generate programming signals on such outputs; the storage section is input a plurality of supply voltage signals and is operative to produce, in connection with information stored therein, one of the supply voltage signals on each of the outputs, it being understood that one voltage signal may be produced on several such outputs. Advantageously, the processor can also be programmed in a simple manner from circuits of the digital type if switches controlled by storage elements are used in the storage section.

Programmable fuzzy analog processor

A transistor threshold extraction circuit having an output and including a first and a second transistor of the same type each having a control terminal and having essentially the same threshold voltage, the control terminal of the first transistor being connected to a constant potential node, a current mirror having at least one input terminal and one output terminal coupled respectively to said first and second transistors to provide bias currents, a first and a second potential reference, and a voltage divider having an intermediate tap and first and second end terminals. The control terminal of the second transistor is coupled to the intermediate tap and the divider is biased by coupling the first and the second end terminals respectively to the first and second potential references. The output is coupled to one of said end terminals.

Threshold extracting method and circuit using the same

The analog processor can carry out processings independently of the operating temperature and process parameters, in a reliable manner and at high performance levels using fairly simple circuitry. To achieve this independence, the processor is basically implemented and integrated with MOS transistors, has both voltage inputs and outputs, and includes a biasing section which supplies voltage bias signals, of which at least one is substantially the sum of a voltage proportional to the threshold voltage of the MOS transistors and a reference voltage. This reference voltage can be extracted from a reference potential which is stable to temperature and process parameters, for example that produced by a bandgap type of generator. A major feature of the processor according to the invention is the linearity of its input-output characteristic relative to that reference voltage. It follows that it may be advantageous to extract that reference voltage by division from a signal indicating the width of the input signal variation range, thereby to achieve compensation for or independence of variations of this range.

Fuzzy analog processor with temperature compensation

A voltage level shift circuit has a first input receiving a first voltage signal and a second input receiving a second voltage signal. The voltage level shift circuit is structured to generate an output voltage at an output terminal which is equal to a sum of the first and second voltage signals. The first voltage signal may be varied to vary a shift of the second voltage signal.

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Bologna, Italy

Eleonora Franchi