National Scientific Corporation

Other

El-Badawy Amien El-Sharawy

Majid M Hashemi

A HE mode dielectric resonator ( ) includes a cylindrical dielectric disk ( ) having top and bottom ends ( ) spaced apart by a closed curve wall ( ). The dielectric disk ( ) has a dielectric constant greater than 40. An axially aligned hole ( ) is formed through the disk ( ) between the top and bottom ends ( ). A conductive wall ( ) is formed at the closed curved wall ( ) but not the top and bottom ends ( ). The hole ( ) has a preferred diameter less than 0.2 times the diameter of the disk. A tuning plug ( ) is formed from a material having a dielectric constant less than 0.5 times the dielectric constant of the dielectric disk ( ) and an unloaded quality factor greater than 2.0 times the unloaded quality factor of the dielectric disk ( ). The tuning plug is inserted to a desired depth within the hole ( ) of the dielectric disk ( ).

Tunable HE&ogr;&ggr;&dgr; mode dielectric resonator

An integrated RF power amplifier includes an on-chip input transformer ( ) and an on-chip output transformer ( ). Each of the transformers ( ) is formed from four spirals. Each primary winding ( ) and each secondary winding ( ) includes positive and negative spirals arranged so that positive current rotates in opposing rotational directions in the positive and negative spirals. The secondary winding ( ) of the input transformer ( ) and the primary winding ( ) of the output transformer ( ) each has a center tap ( ) located at the electrical and physical center of the winding. Positive and negative amplifiers ( ) couple between the secondary winding of the input transformer ( ) and the primary winding of the output transformer ( ). DC biasing for the amplifiers ( ) is provided through the positive and negative spirals of the center-tapped windings ( ) from the respective center taps ( ).

Monolithic balanced RF power amplifier

A heterojunction bipolar transistor ( ) is provided with a silicon (Si) base region ( ) that forms a semiconductor junction with a multilayer emitter ( ) having a thin gallium arsenide (GaAs) emitter layer ( ) proximate the base region ( ) and a distal gallium phosphide (GaP) emitter layer ( ). The GaAs emitter layer ( ) is sufficiently thin, preferably less than 200 &angst;, so as to be coherently strained. In one embodiment, the GaP emitter layer includes a doped region ( ) which serves as the emitter and a non-doped region ( ) on which the intrinsic portion of the transistor ( ) is formed.

Vertical heterojunction bipolar transistor

A static RAM memory cell (,) uses cross-coupled enhancement mode, N-channel MOS drive transistors (,) to form a bistable flip-flop. A load circuit (,) couples between I/O ports (,) of the drive transistors (,) and Vcc. For each drive transistor (,), the load circuit includes a depletion mode, N-channel MOS load transistor (,) and a forward biased tunnel diode (,). The drain and gate of the load transistor (,) couple across the anode and cathode of the tunnel diode (,) so that the forward voltage (V,) of the tunnel diode (,) controls the V,transfer curve (,) of the load transistor. The tunnel diode (,) may be formed at a junction between a mono-crystalline silicon layer (,) at a region (,) which also serves as a source or drain of a transistor (,) and a poly-crystalline silicon layer (,). The poly-crystalline silicon layer (,) also serves as a non-metallic, conductive interconnection (,) to save space.

Electronic semiconductor circuit which includes a tunnel diode

A monolithic inductor (,&prime;) is formed over a silicon or other substrate (,). The inductor (,&prime;) includes at least one coil (,) arranged so that its axis (,) is parallel to the substrate (,). Other inductive features, such as other coils (,) or planar spirals (,) are arranged in series with the coil (,) to guide magnetic flux lines away from the substrate (,). In one embodiment, a common thin film coil core (,) made from a magnetic material is provided for two coils (,). The coil core (,) provides a continuous magnetic material flux path through the two coils (,). In another embodiment, an axis (,) of the coil (,) is located between the plane in which two spirals (,) are located and the substrate (,) to guide magnetic flux lines (,) away from the substrate (,).

Monolithic inductor with magnetic flux lines guided away from substrate

A heterojunction bipolar transistor (,) is provided with a silicon (Si) base region (,) that forms a semiconductor junction with a multilayer emitter (,) having a thin gallium arsenide (GaAs) emitter layer (,) proximate the base region (,) and a distal gallium phosphide emitter layer (40). The GaAs emitter layer (,) is sufficiently thin, preferably less than 200 &angst;, so as to be coherently strained.

Method of forming heterojunction bipolar transistor having wide bandgap, low interdiffusion base-emitter junction

A TE,mode dielectric resonator (,) includes a cylindrical dielectric disk (,) having top and bottom ends (,) spaced apart by a closed curve wall (,). The dielectric disk has an effective dielectric constant greater than 40. An axially aligned hole (,) is formed through the disk (,) between the top and bottom ends (,). A conductive wall (,) is formed at or slightly beyond the wall (,) but does not cover the top and bottom ends (,). The hole (,) has a preferred diameter between 0.21 and 0.4 times the diameter of the disk (,). The disk may be configured as a heterogeneous composite of dissimilar materials which exhibit increasing dielectric constant at increasing radial distance and increasing Q at decreasing radial distance.

Dielectric resonator comprising a dielectric resonator disk having a hole

A static RAM memory cell (30) uses cross-coupled enhancement mode, N-channel MOS drive transistors (36) to form a bistable flip-flop. A load circuit (34) couples between I/O ports (40) of the drive transistors (36) and Vcc. For each drive transistor (36), the load circuit includes a depletion mode, N-channel MOS load transistor (54) and a forward biased tunnel diode (32). The drain and gate of the load transistor (54) couple across the anode and cathode of the tunnel diode (32) so that the forward voltage (V.sub.f) of the tunnel diode (32) controls the V.sub.gs transfer curve (56) of the load transistor.

Static memory cell with load circuit using a tunnel diode

A monolithic inductor (20, 20') is formed over a silicon or other substrate (22). The inductor (20, 20') includes at least one coil (62, 78) arranged so that its axis (58) is parallel to the substrate (22). Other inductive features, such as other coils (64, 70, 72) or planar spirals (74, 76) are arranged in series with the coil (62, 78) to guide magnetic flux lines away from the substrate (22). In one embodiment, a common thin film coil core (60) made from a magnetic material is provided for two coils (62, 64). The coil core (60) provides a continuous magnetic material flux path through the two coils (62, 64). In another embodiment, an axis (58) of the coil (78) is located between the plane in which two spirals (74, 76) are located and the substrate (22) to guide magnetic flux lines (82) away from the substrate (22).

A distributed amplifier (10) configured to amplify an input signal (20) is presented. Within the amplifier (10), a first input phase-shift element (40) shifts the input signal (20) into a first shifted input signal (56). A first active element (18'), coupled to the first input phase-shift element (40), amplifies the first shifted input signal (56) into a first amplified signal (58). A second phase-shift element (42), coupled to the first input phase-shift element (40), shifts the first shifted input signal (56) into a second shifted input signal (62). A second active element (18'), coupled to the second phase-shift element (42), amplifies the second shifted input signal (62) into a second amplified signal (64). A first output phase-shift element (44), coupled to the first active element (18'), shifts the first amplified signal (58) into a first shifted amplified signal (60). A second output phase-shift element (46), coupled to the first output phase-shift element (44) and the second active element (18'), shifts the first shifted amplified signal (60) and the second amplified signal (64) into an output signal (24).

Distributed amplifier and method therefor

A heterojunction bipolar transistor (20) is provided with a silicon (Si) base region (34) that forms a semiconductor junction with a multilayer emitter (38) having a thin gallium arsenide (GaAs) emitter layer (36) proximate the base region (34) and a distal gallium phosphide emitter layer (40). The GaAs emitter layer (36) is sufficiently thin, preferably less than 200 .ANG., so as to be coherently strained.

Growing community of inventors

Gilbert, AZ, United States of America

El-Badawy Amien El-Sharawy