Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Eitaro Miyake

Ichiro Omura

Hiroshi Matsuyama

Tomokazu Domon

Kazuya Kodani

Yoshiki Endo

Tatsuya Hirakawa

Daisuke Ando

Satoshi Yanagisawa

Tatsuo Tonedachi

Junichi Nakao

Osamu Usuda

Hiroshi Fukuyoshi

Masashi Aizawa

Hideaki Kitazawa

Kentaro Takao

Yoshihiko Tojo

According to one embodiment, a connection device includes an engaging claw extending in a first direction from a first member, and a receiving portion provided in a second member. The engaging claw includes a pair of first side surfaces, and a pair of engaging protrusions projecting out from the respective side surface. Each engaging protrusion includes an inclined surface continuous from the first side surface and inclined to the first direction. The receiving portion includes a pair of slopes extending in the first direction and each including a second side surface engaging the first side surface, and an engaging projection connected to the second side surface, the engaging projection engaging the engaging protrusion.

Connection device

Provided is a fastening member which is a columnar fastening member, and the fastening member includes: a first hole provided in a direction parallel to a height direction of the fastening member; a thread on a side surface of the first hole; a planar portion around the first hole; and a projection between the planar portion and the first hole.

Fastening member and semiconductor device

Provided is a terminal plate according to an embodiment including: a first plate portion for being connected to a first semiconductor element; a second plate portion for being connected to a second semiconductor element; a third plate portion provided above the first plate portion and the second plate portion; a first connecting portion provided between the first plate portion and the third plate portion and connecting the first plate portion and the third plate portion; a second connecting portion provided between the second plate portion and the third plate portion and connecting the second plate portion and the third plate portion; a fourth plate portion provided above the first plate portion and the second plate portion and provided on the opposite side of the third plate portion with interposing the first and second plate portions; a third connecting portion provided between the first plate portion and the fourth plate portion and connecting the first plate portion and the fourth plate portion; a fourth connecting portion provided between the second plate portion and the fourth plate portion and connecting the second plate portion and the fourth plate portion; and a fifth plate portion provided above the fourth plate portion, the fifth plate portion connected to the fourth plate portion, and the fifth plate portion having a hole.

Terminal plate and semiconductor device

A semiconductor device including a main board; a first board provided on the main board; first and second semiconductor elements provided on the first board; a first positive terminal provided on the first board; a first negative terminal provided on the first board; a first output terminal provided on the first board; a second board provided on the main board; third and fourth semiconductor elements provided on the second board; a second positive terminal provided on the second board; a second negative terminal provided on the second board; a second output terminal provided on the second board; a first terminal plate connecting the first positive terminal and the second positive terminal, a second terminal plate connecting the first negative terminal and the second negative terminal, and a third terminal plate connecting the first output terminal and the second output terminal.

Semiconductor device

A semiconductor module includes a substrate, first and second wirings on the substrate, a semiconductor package disposed on the first wiring and having a pair of main electrodes on top and bottom surfaces of the semiconductor package, and a third wiring extending between the top surface of the semiconductor package and the second wiring.

Semiconductor module that have multiple paths for heat dissipation

A semiconductor device includes a semiconductor chip comprising a first and second terminal surfaces. An insulator surrounds an outer circumference of a side surface of the chip. A reinforcing-member is arranged between the side surface of the chip and an inner side surface of the insulator and surrounds the outer circumference of the side surface of the chip. A first and second holders hold the reinforcing-member therebetween at a top and bottom surfaces of the reinforcing-member. The first and second holders comprise protrusions facing an inner wall surface of the reinforcing-member, and the when &#x3c6;1in represents an inner-diameter of parts of the reinforcing-member opposing to the protrusions, &#x3c6;1out represents an outer-diameter of the reinforcing-member, &#x3c6;2 represents an outer-diameter of the protrusion of either the first or the second holder, and &#x3c6;3 represents an inner diameter of the insulator, the following Expression 1 is satisfied &#x3c6;1in&#x2212;&#x3c6;2&#x3c;&#x3c6;1out.

A semiconductor device component includes a first portion having a first hole usable as a nut insertion hole, and a second portion having a second hole adjacent to the first hole with a wall interposed therebetween. The first hole includes a first surface facing the wall, a second surface adjacent to the first surface, a third surface adjacent to the second surface, a fourth surface adjacent to the third surface and facing the first surface, a fifth surface adjacent to the fourth surface and facing the second surface, and a sixth surface adjacent to the fifth surface and the first surface and facing the third surface. A distance between the first and fourth surfaces is greater than a distance between the second and fifth surfaces, and greater than a distance between the third and sixth surfaces.

Semiconductor device component and semiconductor device

An aspect of the present embodiment, there is provided a semiconductor device, including an insulating substrate, at least one semiconductor chip provided above the insulating substrate, a wiring terminal including a connection portion electrically connected to the semiconductor chip, a surrounding frame surrounding the semiconductor chip and the connection portion, an embedded material provided in the surrounding frame covering the semiconductor chip and the connection portion, and a pressing unit provided on a surface of the embedded material.

According to one embodiment, a lead frame includes a die pad having a mounting surface on which a semiconductor chip is mounted, plural leads having inner leads and outer leads, and a connecting member that extends from the die pad to both ends of a plurality of leads and connects the die pad and the plurality leads so that the ends of the inner leads are positioned above of the mounting surface.

Lead frame, semiconductor manufacturing apparatus, and semiconductor device

According to one embodiment, the base plate includes first and a second faces that are opposed to each other; the second face has a contoured rear surface, and the first area is set in the center of the plate. There is a second area with via holes in the peripheral areas of the center part. Also, the thickness of the second area is less than the thickness of the first area.

Base plate and semiconductor device

A semiconductor device and manufacturing the semiconductor device are described. There is provided a method of manufacturing a semiconductor device including, disposing a lead frame inside an outer lead so as to couple between a coupling portion and a coupling acceptance portion, the lead frame including a chip mounting portion and the coupling acceptance portion, the outer lead including a frame portion with outer terminal portions and the coupling portion, disposing a semiconductor chip on the chip mounting portion, connecting between the outer terminal portions and the semiconductor chip with a plurality of wires or leads, sealing the outer terminal portion, the lead frame disposed the semiconductor chip on and the wires or the leads by a mold resin, cutting off the outer terminal portions from the outer lead, and uncoupling the coupling portion from the coupling acceptance portion.

Semiconductor device and method of manufacturing the same

A plurality of semiconductor chips is each arranged over a first conductor. Each of semiconductor chips has a first main electrode, a second main electrode and a control electrode. A second conductor is electrically connected to the second main electrode and has columns each having an upper surface arranged over each of the semiconductor chips and equal to the number of the semiconductor chips. A circuit board has openings penetrated by the columns and equal to the number of the semiconductor chips and has a first insulating film, a third conductive film arranged on a back surface of the first insulating film and electrically connected to the second conductor, and a fourth conductive film arranged on a surface of the first insulating film and electrically connected to the control electrode.

High power semiconductor device having semiconductor chips

A pressure-contact type semiconductor device comprises a plurality of semiconductor elements (IGBTs) which are in pressure contact with one another, and in which first main electrodes are electrically connected to a first common main power source plate (pressure-contact type emitter electrode plate), and second main electrodes are electrically connected to a second common main power source plate (pressure-contact type collector electrode). The pressure-contact type semiconductor device also includes a common control signal board which is constituted by a printed circuit board or a multi-layered printed circuit board, and extends over spaces between rows of semiconductor elements, thereby forming a path for sending a control signal.

Pressure-contact type semiconductor device

A press-contact type semiconductor device comprises: a plurality of semiconductor elements each of which has a first main electrode and a control electrode and a second main electrode; a second common main power source plate having the semiconductor elements positioned on a front surface thereof and electrically connected to the second main electrodes; a first common main power source plate arranged on the front surfaces of the semiconductor elements and electrically connected to the first main electrodes; a common control signal/main current plate arranged between semiconductor elements and including at least control signal wiring layers and main current wiring layers; conductive connectors for electrically connecting at least the main current wiring layers and the first common maim power source plate; and conductive elastic members for electrically connecting the main current wiring layers or the first common main power source plate to the conductive connectors by elasticity.

Growing community of inventors

Kawasaki Kanagawa, Japan

Eitaro Miyake