Murata Manufacturing Co., Ltd.

Murata Manufactruing Co., Ltd.

Eita Tamezawa

Keishiro Amaya

Masahiko Kawaguchi

Kazuyoshi Uchiyama

Toshiya Sasaki

Satoki Sakai

Provided is an electronic component that can suppress the occurrence of disconnections between line conductor layers and via hole conductors and a method of manufacturing the electronic component. A multilayer body is formed by stacking insulating layers. A conductor layer is provided on a first insulating layer. A line conductor layer is provided on a second insulating layer that is provided on an upper side of the first insulating layer in a stacking (z-axis) direction. A via hole conductor connects an end portion of the line conductor layer to the conductor layer and extends through the second insulating layer in the z-axis direction. In the via hole conductor, a connection surface connected to the line conductor layer is formed of a circular portion and a protrusion. The protrusion protrudes from the circular portion in the x-axis direction in which the line conductor layer extends from the end portion.

Electronic component and method of manufacturing the same

A small size electronic component has a small direct current resistance value of a conductor pattern and minimal dimensional irregularity of a conductor pattern. In order to form such a component, a photosensitive conductive paste applied on a ceramic substrate and is then exposed through a photo mask and developed so as to form a lower conductor pattern layer of a coil conductor pattern. Then an insulating paste is applied on the ceramic substrate so as to cover the lower conductor pattern layer and the insulating paste is removed with a solvent until at least the upper surface of the lower conductor pattern layer is exposed so as to form an inter-line insulating layer. Furthermore, after applying a photosensitive conductive paste as a film, the exposure and development operation is conducted again while using the photo mask so as to form an upper conductor pattern layer on the lower conductor pattern layer.

Method of manufacturing an electronic component including an inter-line insulating layer and a conductor pattern

A chip inductor has electrode layers, insulating layers disposed on the electrode layers, and an uppermost insulating layer all disposed on a ceramic board. An inorganic pigment such as a Co oxide or an Al oxide is added to the insulating layer at a concentration of from about 2% to about 20% by weight. Break grooves are formed in the form of a lattice on the insulating layer by a laser beam irradiation, and the board is divided along the grooves. By adding the inorganic pigment, the break grooves are effectively formed, and the mother board is divided accurately along the break grooves, such that a chip inductor having an increased L value and an increased Q value is produced.

Chip inductor and manufacturing method therefor

A small size electronic component has a small direct current resistance value of conductor pattern and minimal dimensional irregularity of a conductor pattern. In order to form such a component, a photosensitive conductive paste applied on a ceramic substrate and is then exposed through a photo mask and developed so as to form a lower conductor pattern layer of a coil conductor pattern. Then an insulating paste is applied on the ceramic substrate so as to cover the lower conductor pattern layer and the insulating paste is removed with a solvent until at least the upper surface of the lower conductor pattern layer is exposed so as to form an inter-line insulating layer. Furthermore, after applying a photosensitive conductive paste as a film, the exposure and development operation is conducted again while using the photo mask so as to form an upper conductor pattern layer on the lower conductor pattern layer.

Growing community of inventors

Fukui-ken, Japan

Eita Tamezawa