Siliconware Precision Industries Co., Ltd.

Eing-Chieh Chen

Cheng-Yuan Lai

Tzu-Yi Tien

Jeng-Yuan Lai

Candy Tien

Ting-Ke Chai

Shiu-Tai Tzung

A new semiconductor packaging technology is proposed for the fabrication of a thermally-enhanced stacked-die BGA (Ball Grid Array) semiconductor package. By the proposed semiconductor packaging technology, a substrate is used as a chip carrier for the mounting of two semiconductor chips in conjunction with a heat spreader thereon, wherein the first semiconductor chip is mounted over the substrate through flip-chip (FC) technology; the heat spreader is mounted over the first semiconductor chip and supported on the substrate; and the second semiconductor chip is mounted on the heat spreader and electrically coupled to the substrate through wire-bonding (WB) technology. To facilitate the wire-bonding process, the heat spreader is formed with a plurality of wire-routing openings to allow the bonding wires to be routed therethrough. Since chip-produced heat during operation can be dissipated through the heat spreader, it allows an enhanced heat-dissipation efficiency. In addition, the heat spreader can serve as a grounding plane to the package chips, so that the packaged chips would have better electrical performance during operation.

Thermally-enhanced stacked-die ball grid array semiconductor package and method of fabricating the same

A cavity-down ball grid array package includes a substrate having a through cavity provided therein. A heat sink is attached to the substrate and a semiconductor chip in the cavity is attached to the heat sink and electrically connected to the substrate. A ball grid array is on the substrate and on the semiconductor chip.

Cavity-down ball grid array package with semiconductor chip solder ball

A new semiconductor packaging technology is proposed for the fabrication of a thermally-enhanced stacked-die BGA (Ball Grid Array) semiconductor package. By the proposed semiconductor packaging technology, a substrate is used as a chip carrier for the mounting of two semiconductor chips in conjunction with a heat spreader thereon, wherein the first semiconductor chip is mounted over the substrate through flip-chip (FC) technology; the heat spreader is mounted over the first semiconductor chip and supported on he substrate; and the second semiconductor chip is mounted on the heat spreader and electrically coupled to the substrate through wire-bonding (WB) technology. To facilitate the wire-bonding process, the heat spreader is formed with a plurality of wire-routing openings to allow the bonding wires to be routed therethrough. Since chip-produced beat during operation can be dissipated through the heat spreader, it allows an enhanced heat-dissipation efficiency. In addition, the heat spreader can serve as a grounding plane to the package chips, so that the packaged chips would have better electrical performance during operation.

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Taichung, Taiwan

Eing-Chieh Chen