Kyowa Hakko Kogyo Co., Ltd.

Renesas Electronics Corporation

Millennium Pharmaceuticals Limited

Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Kyowa Hakko Kirin Co., Limited

Eiji Tsukuda

Shinichi Ide

Yuji Nomoto

Michio Ichimura

Shoji Oda

Kenji Matsuno

Kenichiro Sonoda

Robert M Scarborough

Anjali Pandey

Junko Sasaki

Takeo Tanaka

Kenji Shibata

Motoo Yamasaki

Yuzuru Matsuda

Toshiyuki Suzawa

Shigeki Fujiwara

Junko Irie

Keiichi Yano

Kazuo Yamaguchi

Isao Kawamoto

Shigeto Kitamura

Shigeru Chiba

Mayumi Yoshida

Tatsuhiro Ogawa

Yoshikazu Morishita

Mika Makino

Toshihide Ikemura

Chieko Bando

Tatsuya Kunikiyo

Kozo Katayama

Yosuke Takeuchi

Shibun Tsuda

Keiichi Maekawa

Koji Yamada

Yutaka Saitoh

Tohru Kawai

Katsuhiko Ando

Keiko Ochiai

Atsushi Amo

Katsumi Eikyu

Tetsuji Ohno

Youichi Uosaki

Tsutomu Agatsuma

Hidemasa Kondo

Fumito Koizumi

A semiconductor device is provided with an SOI substrate which includes a semiconductor substrate, a ferroelectric layer and a semiconductor layer, and has a first region in which a first MISFET is formed. The first MISFET includes: the semiconductor substrate in the first region; the ferroelectric layer in the first region; the semiconductor layer in the first region; a first gate insulating film formed on the semiconductor layer in the first region; a first gate electrode formed on the first gate insulating film; a first source region located on one side of the first gate electrode and formed in the semiconductor layer in the first region; and a first drain region located on the other side of the first gate electrode and formed in the semiconductor layer in the first region.

Semiconductor device

A semiconductor device includes a semiconductor substrate, a first dielectric film, a conductive film, at least one ferroelectric film, a second dielectric film, a memory gate electrode, a third dielectric film and a control gate electrode. The semiconductor substrate includes a source region and a drain region. The semiconductor substrate includes a first region and a second region between the source region and the drain region. The first dielectric film is formed on the first region. The conductive film is formed on the first dielectric film. The at least one ferroelectric film is formed on one hart of the conductive film. The second dielectric film is formed on the other part of the conductive film. The memory gate electrode is formed on the ferroelectric film. The third dielectric film is formed on the second region. The control gate electrode is formed on the third dielectric film.

Semiconductor device and method of manufacturing the same

A semiconductor device is provided that is capable of reducing the possibility of change in state of memory elements formed over a semiconductor substrate with an insulating layer interposed therebetween. The semiconductor device includes nonvolatile memory elements and a bias circuit. Each of the nonvolatile memory elements includes a drain region and a source region arranged so as to sandwich a semiconductor region where a channel is formed, a gate electrode, and a charge storage layer arranged between the gate electrode and the semiconductor region. The nonvolatile memory elements are arranged over the semiconductor substrate with the insulating layer interposed therebetween. When electrons are stored in the charge storage layer, the bias circuit reduces the potential difference between the gate electrode and at least one of the drain region and source region in order to decrease holes stored in the channel of a nonvolatile memory element.

To provide a semiconductor device having improved reliability by preventing, in a split-gate MONOS memory comprised of a fin type transistor, unbalanced injection distribution of electrons into a charge accumulation film due to the shape of the fin. A memory gate electrode configuring a memory cell is formed over a fin. The impurity concentration of a portion of this memory gate electrode contiguous to an ONO film that covers the upper surface of the fin is made lower than that of a portion of the memory gate electrode contiguous to an ONO film that covers the side surface of the fin.

A semiconductor device includes a semiconductor substrate, an element isolation film, and a fin having side surfaces facing each other in a first direction of an upper surface and a main surface connecting the facing side surfaces and extending in a second direction orthogonal to the first direction. The device further includes a control gate electrode arranged over the side surface via a gate insulation film and extending in the first direction, and a memory gate electrode arranged over the side surface via another gate insulation film having a charge accumulation layer and extending in the first direction. Furthermore, an overlap length by which the memory gate electrode overlaps with the side surface is smaller than an overlap length by which the control gate electrode overlaps with the side surface in the direction orthogonal to the upper surface.

To provide a manufacturing method of a semiconductor device including a memory cell having a higher reliability. First and second stacked structures in a memory cell formation region are formed so as to have a larger height than a third stacked structure in a transistor formation region, and then an interlayer insulating layer is formed so as to cover these stacked structures and then polished.

Manufacturing method of semiconductor device

The present invention relates to nitrogen-containing heterocyclic compounds and pharmaceutically acceptable salts thereof which have inhibitory activity on the phosphorylation of kinases, which inhibits the activity of such kinases. The invention is also related to a method of inhibiting kinases and treating disease states in a mammal by inhibiting the phosphorylation of kinases. In a particular aspect the present invention provides nitrogen-containing heterocyclic compounds and pharmaceutically acceptable salts thereof which inhibit phosphorylation of a PDGF receptor to hinder abnormal cell growth and cell wandering, and a method for preventing or treating cell-proliferative diseases such as arteriosclerosis, vascular reobstruction, cancer and glomerulosclerosis.

Quinazoline derivatives as kinase inhibitors

Nitrogenous heterocyclic compounds

The present invention relates to nitrogen-containing heterocyclic compounds and pharmaceutically acceptable salts thereof which have inhibitory activity on the phosphorylation of kinases, which inhibits the activity of such kinases. The invention is also related to a method of inhibiting kinases and treating disease states in a mammal by inhibiting the phosphorylation of kinases. In a particular aspect the present invention provides nitrogen-containing heterocyclic compounds and pharmaceutically acceptable salts thereof which inhibit phosphorylation of a PDGF receptor to hinder abnormal cell growth and cell wandering, and a method for preventing or treating cell-proliferative diseases such as arteriosclerosis, vascular reobstruction, cancer and glomeruloscierosis.

The present invention relates to nitrogen-containing heterocyclic compounds and pharmaceutically acceptable salts thereof which have inhibitory activity on the phosphorylation of kinases, which inhibits the activity of such kinases. The invention is also related to a method of inhibiting kinases and treating disease states in a mammal by inhibiting the phosphorylation of kinases. In a particular aspect the present invention provides nitrogen-containing heterocyclic compounds and pharmaceutically acceptable salts thereof which inhibit phosphorylation of a of a PDGF receptor to hinder abnormal cell growth and cell wandering, and a method for preventing or treating cell-proliferative diseases such as arteriosclerosis, vascular reobstruction, cancer and glomerulosclerosis.

Nitrogenous heterocylic compounds

Growing community of inventors

Tokyo, Japan

Eiji Tsukuda