Other

Hitachi, Ltd.

Eiji Ohue

Katsuyoshi Washio

Katsuya Oda

Masao Kondo

Hiromi Shimamoto

Masamichi Tanabe

Toru Masuda

Takahiro Onai

Kenichi Ohhata

Taizo Yoshikawa

A large time constant is caused due to parasitic capacitance at an anode terminal of a photodetector of an optical receiver. Therefore, an optical receiver wherein a variable negative capacitor mainly including an NPN-type transistor operable at high speed is configured and is connected to the input terminal of a preamplifier to which the output of the photodetector is input so that parasitic capacitance caused in the photodetector and due to packaging is equivalently reduced and the fluctuation of parasitic capacitance caused due to manufacturing dispersion is also compensated is provided.

Optical receiver using variable negative-capacitance circuit

A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si&mdash;Ge and a base leading-out electrode are connected via a link base made of polycrystal Si&mdash;Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si&mdash;Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.

Bipolar transistor and manufacturing method thereof

Bipolar transistor and manufacting method thereof

A self-aligned bipolar transistor which has a small base resistance and small emitter-base and collector-base capacitances and is operable at high speed is disclosed. This bipolar transistor is characterized in that a low concentration collector region made of single crystal Si--Ge is self-alignedly formed between an intrinsic base of single crystal Si--Ge and an intrinsic base, and that an extrinsic base electrode and an intrinsic base are connected only through a doped external base. With this arrangement, an energy barrier is not established at the collector base interface owing to the formation of the low concentration region of single crystal Si--Ge, so that the transit time of the carriers charged from the emitter is shortened. The connection between the intrinsic base and the extrinsic base electrode via the doped external base results in the reduction of the base resistance. In addition, the self-aligned formation of the emitter-base-collector leads to the reduction in capacitance between the emitter and the base and also between the collector and the base. Accordingly, a high-speed bipolar transistor can be realized and thus, circuits using the transistor are operable at high speed.

Heterojunction bipolar transistor

Growing community of inventors

Ome, Japan

Eiji Ohue