Sony Corporation

Sony Semiconductor Solutions Corporation

Eiji Makino

Tsutomu Haruta

Ryoji Suzuki

Takahiro Abiru

Keiji Mabuchi

Youji Sakioka

Shinjiro Kameda

Tetsuo Nomoto

Masahiro Itoh

Ryoji Eki

Takeshi Yamaguchi

Tetsuji Nakaseko

Takayuki Usui

Hiroaki Ono

Satoru Ishii

Shizunori Matsumoto

Atsushi Matsuzono

Masafumi Takiguchi

Shoji Terada

Daisaku Izumi

Shigehisa Ohkawara

Shinsuke Shimomoto

Tatsuya Matsumura

Shizunorl Matsumoto

An image sensor that has a pixel array section in which pixels are arrayed in a two-dimensional manner in vertical and horizontal directions and that controls an exposure time of each pixel in a rolling shutter method is disclosed. The sensor includes control means for determining an electronic shutter occurrence number within one horizontal scanning period, which is the number of rows where electronic shutters are simultaneously performed in one horizontal scanning period, by an operation based on an address addition amount (P, P, P, . . . , P) when a vertical address movement amount of the pixel array section for every one horizontal scanning period in an exposure regulation shutter, which is an electronic shutter for regulating exposure, executed corresponding to electric charge reading in each pixel is expressed as repetition of the address addition amount (P, P, P, . . . , P).

Image sensor, electronic apparatus, and driving method of electronic apparatus

A MOS type solid state imaging device in which unit pixels, each having a photodiode, a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node are arrayed in a matrix. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example &#x2212;1V).

Solid state imaging device and camera system

A solid-state imaging device includes: a pixel section wherein pixels including photoelectric conversion devices are arranged in a matrix; and a pixel driving section including a row selection circuit which controls the pixels to perform an electronic shutter operation and readout of the pixel section. The row selection circuit has a function of selecting a readout row from which a signal is read out and a shutter row on which reset is performed by discharging charge accumulated in the photoelectric conversion devices, in accordance with address and control signals. The row selection circuit can set, in accordance with the address and control signals, in the pixels of the selected row, at least a readout state, a discharge state where a smaller amount of the charge accumulated in the photoelectric conversion devices than the reset is discharged, an electronic shutter state, and a charge state where the charge is accumulated in the photoelectric conversion devices.

Solid-state imaging device and camera system

An MOS type solid state imaging device in which unit pixelseach having a photodiode, a transfer transistorfor transferring the signal of the photodiodeto a floating node N, an amplifier transistorfor outputting the signal of the floating node Nto a vertical signal line, and a reset transistorfor resetting the floating node Nare arrayed in a matrix and in which a gate voltage of the reset transistoris controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example &#x2212;1V).

A power supply device that switches one of a first power supply, a second power supply, and a third power supply, all of which supply power to an auxiliary device, to a transfer gate in a CMOS image sensor having a photodiode and outputs the corresponding power to the transfer gate is disclosed. The device includes: a first transistor driven by the second power supply and outputting power of the second power supply to the transfer gate; a second transistor driven by the second power supply and outputting power of the first power supply to the transfer gate; a third transistor driven by the third power supply and outputting power of the third power supply to the transfer gate; and a fourth transistor located before the second transistor, driven by the first power supply, and outputting power of the first power supply to a source of the second transistor.

Power supply device, operation method of power supply device, electronic apparatus, and operation method of electronic apparatus

An image signal processing device includes: a color mixture correction circuit correcting color mixture among pixels arranged in the row and column directions, having plural light receiving units which perform photoelectric conversion and including filters dividing light incident on respective plural light receiving units into plural color components, wherein the color mixture correction circuit performs correction processing to a signal value of a target pixel of color mixture correction by associating respective signal values of neighboring pixels adjacent to the target pixel of color mixture correction with correction parameters unique to an address of each signal.

Image signal processing device, imaging device, image signal processing method and program

An image sensor includes a solid-state image pickup device, an optical system, and a flash. The solid-state image pickup device has an electronic shutter function of outputting accumulated signal charges at a timing corresponding to a shutter speed. The optical system collects incident light to an image pickup area of the solid-state image pickup device. The flash irradiates light to an object to be photographed by the solid-state image pickup device. The solid-state image pickup device includes a pulse generator circuit for generating one or more of an electronic shutter pulse for controlling an accumulation time of signal charges by using the electronic shutter function, an optical system movement pulse for controlling movement of the optical system, and a flash pulse for controlling an emission timing of the flash.

Image sensor

A solid-state imaging device includes: an imaging unit taking a subject image focused by an imaging optical system; a digital signal processing unit generating image data of the subject image taken by the imaging unit and luminance data thereof; an input/output unit inputting and outputting data; a focus evaluation value generating unit generating a focus evaluation value of the subject image based on the luminance data outputted from the digital signal processing unit and outputting the focus evaluation value from the input/output unit; and an imaging drive unit starting an imaging operation by the imaging unit when an imaging instruction signal is inputted from the input/output unit, and outputting an imaging-end timing signal from the input/output unit when the imaging operation is completed.

Imaging apparatus with an input/output unit and a lens moving mechanism

A solid-state imaging device having a pixel array section in which pixels including photoelectric conversion elements are arranged in a matrix form, and sweeping out unnecessary charges by setting a predetermined number, two or more, of adjacent rows or a predetermined number, two or more, of adjacent columns, in the pixel array section, to a single group, and by applying a shutter pulse in units of groups before storing signal charges, and sequentially reading the signal charges in the units of groups. In the solid-state imaging device, a pre-shutter pulse is applied to pixels belonging to at least a single row or a single column within a succeeding group and adjacent to a preceding group, prior to the shutter pulse, before a reading timing for the preceding group, to sweep out unnecessary charges stored in the pixels.

Solid-state imaging device and image capture apparatus with anti-blooming pre-shutter operation

A MOS type solid state imaging device having unit pixels, each having a photodiode a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example &#x2212;1V).

An image sensor that supplies a control signal together with an address specifying each of a plurality of pixels arrayed in a pixel array with predetermined rows and columns to thereby perform an electronic shutter operation on a pixel corresponding to the address or perform reading of a pixel signal of a pixel corresponding to the address, is disclosed. The sensor includes: address generating means for generating a shutter row address specifying a row of pixels, on which an electronic shutter operation is to be performed within one horizontal period, among the pixels arrayed in the pixel array and a read row address specifying a row of pixels on which reading of a pixel signal is to be performed within the same one horizontal period; first storage means for storing the shutter row address; and second storage means for storing the read row address.

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Kanagawa, Japan

Eiji Makino