Renesas Electronics Corporation

Nec Corporation

Nec Electronics Corporation

Eiji Io

Tetsuya Iida

Shunji Kubo

Koichi Ando

Hideyuki Tajima

A semiconductor device includes a base member, a multilayer wiring layer, and a first resistive element. The multilayer wiring layer is formed on the base member. The first resistive element is formed in the multilayer wiring layer. The first resistive element includes a first conductive part, a second conductive part and a third conductive part. The second conductive part is formed over the first conductive part. The third conductive part electrically connects the first conductive part and the second conductive part with each other. A length of the third conductive part in a first direction along a surface of the base member is greater than a length of the third conductive part in a second direction along the surface of the base member and perpendicular to the first direction.

Semiconductor device

In a nonvolatile semiconductor memory device, a floating gate is formed on a semiconductor substrate through a gate insulating film, and has a first portion contacting the gate insulating film and a second portion extending upwardly from a part of a surface of the first portion. A first diffusion layer is formed in the semiconductor substrate to have a plane parallel to a surface of the semiconductor substrate. A second diffusion layer is formed in the semiconductor substrate, to have the plane. A control gate is provided near the floating gate above a channel region in the semiconductor substrate and is formed on a first side of the first portion. A conductive film is connected with the first diffusion layer and is formed on a second side of the first portion and a first side of the second portion through the first insulating film.

Nonvolatile semiconductor memory device and manufacturing method therefor

A nonvolatile semiconductor memory device includes a semiconductor substrate, a select gate formed above the semiconductor substrate, a floating gate formed above the semiconductor substrate and an erase gate positioned lower than an upper surface of the floating gate, and opposite an edge of a lower surface of the floating gate.

Nonvolatile semiconductor memory with erase gate and its manufacturing method

A tunnel oxide film a first polysilicon layer a poly&mdash;poly insulating film and a second polysilicon layer are formed on a semiconductor substrate in a memory cell area. After that, with two photo resists -S and -M as a mask, patterning is performed for the films, a layered product of the films formed according to the photo resist -S is taken as a gate electrode of a selection transistor S, and a layered product of the films formed according to the photo resist -M is taken as a gate electrode of a memory transistor M.

Nonvolatile semiconductor device having a memory cells each of which is constituted of a memory transistor and a selection transistor

A CMOS transistor and a memory cell transistor are formed without causing deterioration to reliability and performance. A step of covering a memory cell region with an HTO film and forming sidewalls in the CMOS transistor while exposing a diffusion region of the CMOS transistor, a step of depositing titanium, and a step of reacting the diffusion region with the titanium, forming a titanium silicide in the CMOS, transistor source and drain are provided.

Method for fabricating semiconductor device including memory cell region and CMOS logic region

A tunnel oxide film,, a first polysilicon layer,, a poly-poly insulating film,and a second polysilicon layer,are formed on a semiconductor substrate in a memory cell area. After that, with two photo resists,-S and,-M as a mask, patterning is performed for the films, a layered product of the films formed according to the photo resist,-S is taken as a gate electrode of a selection transistor S, and a layered product of the films formed according to the photo resist,-M is taken as a gate electrode of a memory transistor M.

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Tokyo, Japan

Eiji Io