Kawasaki Steel Corporation

Other

Tokyo Electron Limited

Eiichi Kondoh

Tomohiro Ohta

Yumiko Kawano

Nobuyuki Takeyasu

Tomoharu Katagiri

Hiroshi Yamamoto

Hiroshi Shinriki

Tadashi Nakano

Takeshi Kaizuka

Tohru Mitomo

Kenichi Otsuka

Hiroshi Sekihashi

Vincent Vezin

Kenichi Kubo

Yoshinori Kureishi

Toru Mitomo

An object of the invention is to make it possible to perform the embedding of a Cu diffusion preventing film and a Cu film to a fine pattern of a high aspect ratio by using a medium of a supercritical state in a manufacturing process of a semiconductor device. The object of the invention is achieved by a substrate processing method comprising a first step of processing a substrate by supplying a first processing medium containing a first medium of a supercritical state onto the substrate, a second step of forming a Cu diffusion preventing film on the substrate by supplying a second processing medium containing a second medium of a supercritical state onto the substrate, and a third step of forming a Cu film on the substrate by supplying a third processing medium containing a third medium of a supercritical state onto the substrate.

Semiconductor device

A metal interconnection is prepared by forming an underlying metal film of high melting point metal such as Ti and/or high melting point metal compound such as TiN layers above a semiconductor substrate, plasma etching the surface of the underlying metal film in a gas atmosphere containing chloride, and forming an interconnecting metal film such as Al, Cu, Au and Ag on the underlying metal film. Alternatively, a metal interconnection is prepared by forming an insulating film above a semiconductor substrate, forming connecting holes in the insulating film, forming an underlying metal film such as TiN on the insulating film and the bottom and side wall of the connection holes by a CVD process under controlled conditions, and forming an interconnecting metal film such as Al on the underlying metal film. The TiN film has (111) preferential orientation and the aluminum film has (111) preferential orientation, smooth surface and effective coverage. The thus fabricated metal interconnection has improved reliability including electromigration immunity when used in semiconductor devices and finding advantageous use in miniaturized semiconductor devices.

Method for making metal interconnection

A metal interconnection is prepared by forming an underlying metal film of high melting point metal such as Ti and/or high melting point metal compound such as TiN layers above a semiconductor substrate, plasma etching the surface of the underlying metal film in a gas atmosphere containing chloride, and forming an interconnecting metal film such as Al, Cu, Au and Ag on the underlying metal film. Alternatively, a metal interconnection is prepared by forming an insulating film above a semiconductor substrate, forming connection holes in the insulating film, forming an underlying metal film such as TiN on the insulating film and the bottom and side wall of the connection holes by a CVD process under controlled conditions, and forming an interconnecting metal film such as Al on the underlying metal film. The TiN film has (111) preferential orientation and the aluminum film has (111) preferential orientation, smooth surface and effective coverage. The thus fabricated metal interconnection has improved reliability including electromigration immunity when used in semiconductor devices and finding advantageous use in miniaturized semiconductor devices.

Metal interconnection and method for making

A semiconductor device has a multilevel interconnection structure that includes an insulating interlayer formed on a lower wiring layer, a semiconductor substrate, and at least one via hole. The via plug partially fills the via hole, and the upper surface of the via plug may have a convex shape or a surface of the lower wiring layer at a bottom of the via hole may have a concave shape. Where two via holes are present, one via plug substantially fills the shallowest via hole, and partially fills the deepest via hole. The upper wiring layer may be formed over the via plug to fill a remaining portion of the via hole not filled by the via plug.

Semiconductor device having a multilevel interconnection structure

A semiconductor device has a multilayered structure that includes an insulating interlayer formed on a lower wiring layer, a semiconductor substrate, and a via hole. The semiconductor device is manufactured by a method that includes plasma etching at least one surface of the insulating interlayer the in an atmosphere having as a major component either a carbonless, chlorine-based gas or a carbonless, chlorine-based gas and an inactive gas in order to remove contaminates that would otherwise promote reactivity with aluminum CVD on the surface of the insulating interlayer.

Method of manufacturing semiconductor device having multilevel

Method for making metal interconnection with chlorine plasma etch

A method of supplying, in a gaseous phase, a material which is in a viscous liquid phase at normal temperature. The viscous liquid material is provided in a bubbler and the pressure of the vessel is maintained below atmospheric pressure. A carrier gas is supplied through a nozzle opening in the liquid material inside the vessel. The carrier gas is temporarily dissolved in the liquid and then released to form fine bubbles into which the liquid material is vaporized, so that the vapor of the material is supplied together with the carrier gas.

Method for supplying liquid material and process for forming thin films

An apparatus for forming, by a chemical vapor deposition process, a thin film of crystals such as diamond on a surface of a heated substrate placed in a reaction vessel. The apparatus has a substrate supporting structure, a heater for heating the substrate by heat conduction or by electric current supplied directly to the substrate, and a cooling device for cooling the substrate. The heater is controlled in accordance with the measured temperature of the substrate so as to accurately maintain the substrate temperature at a constant level.

Chemical vapor deposition method for forming thin film

Chemical vapor deposition apparatus for forming thin film

Growing community of inventors

Chiba, Japan

Eiichi Kondoh