Nec Corporation

Seiko Epson Corporation

Nippon Electric Co., Ltd.

Yoshikawa Rf Systems Co., Ltd.

Sony Corporation

Oki Electric Industry Co., Ltd.

Nippon Steel Corporation

Eiichi Ishii

Noboru Asauchi

Yasuhiko Kosugi

Takakazu Fukano

Toshihisa Saruta

Yushi Ihara

Shigeo Yoshizawa

Kohei Nojiri

Hok Huor Ou

Yuji Matsumoto

Shinri Fukuda

Takakazu Yoshioka

Chizuru Makita

Shiro Nagata

Makoto Yoshimizu

Masuo Osuga

An external solenoid positioned external to a tire, and an internal solenoid provided inside a valve of the tire, which transmits and receives power by an alternating magnetic field in a predetermined high frequency band that generates an induced alternating current in the internal solenoid, is used as a new source of power for a tire pressure/temperature detection device instead of a battery. If the alternating magnetic field in a predetermined high frequency band is well matched to the physical structure and electrical structure of the tire, then, in the space between the tire and a wheel, an induced alternating magnetic field component is distributed that is substantially parallel to the axis of rotation of the tire. If the internal solenoid is matched to the direction of maximum magnetic field reception, when the tire rotates, and when the position of the wheel is stopped, substantially stable power may be received.

Tire condition detection system and induction feed method thereof

A plurality of small loop antenna cellsandare magnetically coupled to an antenna coilof a non-contact type data carrierIn the plurality of small loop antenna cells, the directions of the magnetic moments of the signals transmitted to the non-contact type data carrierare opposite to each other, the sum of the magnetic moments generated from all the small loop antenna cellstois zero and a conductor forming a short ring patternis provided collectively for the plurality of small loop antenna cells. Thus, imbalance caused between the small loop antenna cellstocan be compensated for by the short ring pattern

Loop antenna device

The present invention is a container for holding printing fluid material. The container includes a detector, a memory unit, a communication module, a first electric power generator, and a second electric power generator. The communication module is configured to transmit at least one of a result of the detection and the information regarding the container to the printing device. The first electric power generator is configured to generate a first electric power by utilizing the radio wave received from the printing device. The second electric power generator is configured to generate a second electric power from the first electric power. The second electric power is supplied to both the detector and the memory unit.

Container for printing fluid material

A trace line picture which is manually drawn with a pen is taken in by a camera or a scanner, and is supplied to a personal computer as an original line drawing. The personal computer carries out thinning processing on the supplied line drawing, and paints all pixels in a closed area surrounded by the thinned line with a color designated by an operator. Then, the computer thickens the original trace line and colors pixels on the thickened trace line with a predetermined color, in accordance with a command from the operator. The computer synthesizes the picture of the closed area surrounded by the thinned line and the thickened picture in accordance with a predetermined synthesis formula. Finally, the computer checks whether or not pictures synthesized over several frames are displayed as an appropriate dynamic image. By the above-described production processing, an animation color image can be quickly produced by using the computer.

Image processing device and method for producing animated image data

A data carrier system is provided including: a main apparatus including a first control unit for outputting a first signal and a first coil unit having at least a transmission coil for transmitting the first signal; a tuner circuit unit having a tuner circuit being tuned with the frequency of the first signal, the tuner circuit having a tuning coil disposed facing the transmission coil of the first coil unit; and a tag including a second coil unit having at least a reception coil and a second control unit for performing a predetermined control operation in accordance with the first signal transmitted from the main apparatus and received by the reception coil of the second coil unit.

Data carrier system

A signal FSK-modulated with a binary data signal has first signal portions representing first logical level data contained in the binary data signal and second signal portions representing second logical level data contained in the binary data signal. Each of the first signal portions has a first frequency and lasts for a first time period and each of the second signal portions has a second frequency and lasts for a second time period. These first and second time periods are determined such that a number of cycles of the FSK-modulated signal appearing in each of the first time periods is equal to a number of cycles of the FSK-modulated signal appearing in each of the second time periods. For demodulation of the FSK-modulated signal, a time period corresponding to a predetermined number of successively appearing cycles of the modulated signal, among those appearing during the whole of each signal portion, is established, clock pulses from a clock pulse source are counted for the established time period, and the resulting count values are compared to determine whether received data is a first logical level data or second logical level data.

FSK modulating and demodulating apparatus wherein each binary data is

A transistor circuit has a first and a second transistor differentially connected with each other and having bases receiving an input signal therebetween; a first and a second resistor respectively connected between collectors of the first and second transistors and a first power supply terminal; a third transistor having an emitter receiving a voltage dropped by the first resistor and a collector connected to an output terminal; a fourth transistor having an emitter receiving a voltage dropped by the second resistor; and a fifth transistor having a collector connected to the output terminal and an emitter connected to the second power supply terminal. Biasing voltages are provided to bases of the third and fourth transistors thereby causing the fourth transistor to be conductive when the voltage dropped by the first resistor is larger than the voltage dropped by the second resistor and causing the third transistor to be conductive when the voltage dropped by the first resistor is smaller than the voltage dropped by the second resistor. The fifth transistor become conductive when the fourth transistor is in a conductive state. The circuit is capable of operating in a high speed and the output amplitude is such that the low level can be lower to a point just before the saturation of the fifth transistor and the high level can be raised near to the power supply voltage. The power supply voltage required to the circuit is substantially reduced.

Circuit for converting ECL level signals to MOS level signals

A digital-to-analog converter which includes a plurality of flip-flops each temporarily storing the corresponding bit data of digital data to be converted into an analog signal and producing true and complementary outputs relative to the stored data, the true outputs from the respective flip-flops being added with each other by a first adder and the complementary outputs from the respective flip-flops being added with each other by a second adder, and a subtracter subtracting the output from the second adder from the output from the first adder to obtain a final analog signal.

Digital to analog converter enhancing conversion precision

An FM demodulator having improved demodulation sensitivity, and suitable for monolithic integration. As demonstrated in various embodiments, increased sensitivity is made possible= by narrowing the demodulation band on a low frequency side. According to the various embodiments, a monostable multivibrator or first pulse generator receives an input signal and provides an output having first and second states having a combined duration equal to one period of the input signal, or alternatively equal to one-half period of the input signal. A second pulse generator, responsive to the output of the first pulse generator, generates another output having third and fourth states whose combined duration is the same as the combined duration of the first and second states. Demodulation is accomplished finally through a low-pass filter, which integrates the output of the second pulse generator.

Pulse count type FM demodulator

A speed control system for a DC motor is disclosed. This system includes a first transistor connected between a first terminal and a reference terminal, a second transistor connected between a second terminal and the reference terminal, an error amplifier having first input terminal connected via a reference voltage circuit to the first terminal, a second input terminal connected to a third terminal and an output terminal connected to the bases of the first and second transistors, a first resistor connected between a power terminal and the second terminal, a second resistor connected between the first and third terminals, and a third resistor connected between the second and third terminals, and the motor is connected between the first terminal and the power terminal.

Speed control system for DC motor

The motor control circuit is constituted by a current controlling circuit having a first output terminal connected to a source terminal via a resistor, a second output terminal connected to the source terminal through a motor to be controlled, the currents outputted by the first and second output terminals being controlled by an input signal, a reference voltage generator producing a constant reference voltage, a comparator comparing the reference voltage with the output voltage of the second output voltage, a drive circuit responsive to the output voltage of the comparator for applying a control signal to the current controlling circuit, and a limiter which prevents the voltage at the first output terminal of the current controlling circuit from becoming lower than the reference voltage.

Electric motor control circuit

A transistor is connected to form a diode and connected with another transistor so that the base and the emitter is connected to the base and the emitter of the other transistor, respectively, thereby to constitute a partial current mirror. A plurality of the partial current mirrors thus constituted are serially connected between an input terminal and a reference terminal, and an output terminal is connected to the collector of a partial current mirror which is directly connected to the reference terminal. Transistors of the same polarity are used to obtain an output current larger than an input current. On the contrary, to obtain an output current smaller than an input current, the transistors constituting the partial current mirror directly connected to the reference terminal are made to have the opposite polarity to the transistors constituting other partial current mirrors.

Current mirror circuit with a large current ratio

The magnetic tape recording apparatus includes an erasing head for demagnetizing a magnetic tape, a recording head for recording an input recording tape on the magnetic tape, an oscillator generating an erasing A.C. signal the amplitude of which is changed in accordance with the kind of the magnetic tape, an amplitude limitter receiving the erasing A.C. signal to produce a constant A.C. signal irrespective of the kind of the magnetic tape, a gain-controlled amplifier amplifying the constant A.C. signal with a gain controlled with a gain control signal to obtain a A.C. bias signal, an adder adding the A.C. bias signal with the input recording signal to apply the added signal to the recording head, and a means for obtaining said gain control signal from the added signal. The gain control signal obtaining means may include a low-pass filter receiving the added signal, a peak-detector converting the output from the low-pass filter to a D.C. signal, and a comparator comparing the D.C. signal with a reference voltage to obtain the gain control signal.

Tape recording apparatus provided with a bias control device

An FM demodulator circuit particularly suited for construction as an integrated circuit is disclosed. Circuitry which may also serve the function of an intermediate frequency amplifier and limiter shapes the input FM signal into two rectangular waves having opposite phases which are applied to the bases of first and second transistors. First and second constant current sources supply substantially constant currents to the emitters of the first and second transistors, respectively, and a capacitive element is connected between the emitters of the first and second transistors. An adder circuit adds the collector outputs of the first and second transistors, and the added output is supplied to a low-pass filter to derive an analog output.

Demodulator circuit for frequency-modulated signal

A signal processing circuit for an FM signal receiver suitable for constructing in an integrated circuit is disclosed. The signal processing circuit comprises a differential amplifier circuit receiving first and second demodulated signals of the frequency modulated signal and providing first and second output signals. A current switching circuit has a first input point for receiving the second output signal of the amplifier and a second input point for receiving the output of a constant current source. The current switching circuit switches current paths from the first and second input points to first and second output points in response switching control inputs. A first current mirror has an input point coupled to the second output point of the current switching circuit and an output point coupled to the first output signal of the amplifier circuit. A second current mirror has an input point coupled to the first output point of the current switching circuit, a first output point coupled to the output point of the first current mirror and a second output point coupled to an output terminal. A null-centered indicator is connected between a reference voltage terminal and the junction of the output point of the first current mirror and the first output point of the second current mirror. A potential difference detector can be inserted between the reference voltage terminal and the null-centered indicator.

Growing community of inventors

Tokyo, Japan

Eiichi Ishii