Georgia Tech Research Corporation

E. I. Du Pont De Nemours

Ege Engin

Madhavan Swaminathan

Prathap Muthana

Lixi Wan

Tae Hong Kim

Krishna Srinivasan

The present invention describes methods and apparatus for electromagnetic band gap structure synthesis. An exemplary embodiment of the present invention provides a method of electromagnetic band gap structure synthesis, which includes the step of providing a set of desired characteristics for an electromagnetic band gap structure. Furthermore, the method includes generating populations of patch shape members with a genetic algorithm routine and solving one or more of patch shape members of the populations with an electrodynamics modeling technique. Thereafter, the method includes the step of converting the output of the electrodynamics modeling technique into a set of response data for one or more of the patch shape members and calculating a fitness level for one or more of the sets of response data in comparison to the set of desired characteristics for the electromagnetic band gap structure. Next, the method includes the step of determining whether the fitness level of one of the patch shape members is within a predetermined tolerance. Subsequently, if none of the patch shape members provides a fitness level within the predetermined tolerance, then the steps of generating, solving, converting, calculating, and determining are repeated.

Systems and methods for electromagnetic band gap structure synthesis

Disclosed are exemplary finite difference methods for electromagnetically simulating planar multilayer structures. The exemplary finite difference methods simulate multilayer planes by combining the admittance matrices of single plane pairs and equivalent circuit models for such single plane pairs based on multilayer finite difference approximation. Based on the methods, coupling between different layers through electrically large apertures can be modeled very accurately and efficiently.

Multilayer finite difference methods for electrical modeling of packages and printed circuit boards

One embodiment of the present invention provides advice for providing a low noise power supply package to an integrated circuit comprising a semiconductor die, input/output power supply terminals, and an array of embedded ceramic capacitors selected from discrete, planar and combinations thereof wherein said capacitors are placed in the locations selected from within the perimeter of the shadow of the semiconductor die, partially within the perimeter of the shadow of the semiconductor die, near the perimeter of the shadow of the semiconductor die, and combinations thereof.

Device having an array of embedded capacitors for power delivery and decoupling of high speed input/output circuitry of an integrated circuit

One embodiment of the present invention provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz including installing in said package an array of embedded discrete ceramic capacitors, and optionally planar capacitor layers. A further embodiment provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz including an array of embedded discrete ceramic capacitors with different resonance frequencies, arranged in such a way that the capacitor array's impedance vs frequency curve in the critical mid-frequency range yields impedance values at or below a targeted impedance value.

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Ege Engin