Intel Corporation

Texas Instruments Corporation

Efrat Levy

Naor Goldman

Noam Tal

Alex Nayshtut

Oleg Pogorelik

Yonina Eldar

Charles Sestok

Ziv Kfir

Elihay Shalem

Systems, devices, and techniques for network-enabled device provisioning are disclosed herein. In some embodiments, a network-enabled device may include: a storage device; listening logic to wirelessly receive a plurality of key fragments from a corresponding plurality of peer devices, to cause storage of the plurality of key fragments in the storage device, and to receive an encrypted provisioning message from a management device; key generation logic to generate a decryption key based on the plurality of key fragments stored in the storage device to decrypt the encrypted provisioning message, and to decrypt the encrypted provisioning message using the decryption key; and control logic to provision the network-enabled device in accordance with instructions included in the decrypted provisioning message. Other embodiments may be disclosed and/or claimed.

Network-enabled device provisioning

Some demonstrative embodiments include devices, systems and methods of multi-channel processing. For example, a multi-channel data processor may process data of a plurality of channels, the multi-channel data processor is to switch from processing a first channel to processing a second channel of the plurality of channels by performing a context switch during a single clock cycle, the context switch including storing first state context corresponding to a processing state of the first channel and loading previously stored second state context corresponding to a processing state of the second channel.

Device, system and method of multi-channel processing

A novel apparatus for and method of upstream power control for multiple transmit channels. The invention is particularly useful in environments that include two level amplification, wherein the first level corresponds to each channel separately and the second level corresponds to the joint sum of all the channels. When working with two-level amplification, changing the joint sum amplification is permitted during specific time periods known as 'CMTS re-configuration time' in the DOCSIS specification. The mechanism functions to maintain an optimal transmit power operating point of the PGA using self-configuration without any need to receive permission from an exterior control entity such as the cable head-end thus bypassing the prior art requirement of waiting for a global reconfiguration time from the CMTS (i.e. when the specification assures that there is sufficient time to change the PGA gain). This can be achieved with high confidence if there is sufficient quiet time (which is calculated) to perform the self-configuration of the PGA within a specific period of time.

Upstream power control for multiple transmit channels

A timing skew estimation system is disclosed that includes a plurality of interleaved analog-to-digital converter circuits (ADCs), a timing mismatch estimation unit, and a correction unit. The timing mismatch estimation unit calculates a correlation between each of the plurality of ADCs. Then the timing mismatch estimation unit calculates a cost function for each of the plurality of ADCs, except the reference ADC. The timing mismatch estimation unit further calculates a gradient for each of the plurality of ADCs, except the reference ADC. The timing mismatch estimation unit also continually calculates the timing skew of each of the plurality of ADCs, except the reference ADC, as the sum of an immediately previous estimate of the timing skew of each ADC, except the reference ADC, and a product of a function of the gradient of each of the plurality of ADCs, except the reference ADC, and a step size, The correction unit continually corrects the output of each of the plurality of ADCs, except the reference ADC, based on the estimates of the timing skew of each of the plurality of ADCs, except the reference ADC. Eventually, the timing skew estimation system determines a converged estimate of the timing skew of each of the plurality of ADCs, except the reference ADC. A method of estimating timing skew and timing skew estimation circuitry are also disclosed.

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Tel Aviv, Israel

Efrat Levy