Advanced Micro Devices Corporation

Lightwave Microsystems Corporation

Edwin Fontecha

Valerie Vivares

Viswanath Valluri

Robert A Newman

Mohammad Zubair Khan

Melissa Siow-Lui Lee

Donald Bottarini

Melissa Siow Lui Lee

An apparatus and method to vertically route and physically pass multiple optical fibers through the walls of a package. One variation is a method to route an optical fiber ribbon through a wall of a package by routing and securing the width of the optical fiber ribbon perpendicularly to a component within the package. Another variation involves a package having an enclosure with an opening through which a group of optical fibers are arrayed in a rectangular cross-section with a width which is longer than a thickness. The package includes a component inside the enclosure, a group of optical fibers routed through the opening to the component where the width of the rectangular cross-section is perpendicularly oriented to the base of the enclosure, and a clamp to secure the width of the rectangular cross-section of the group of optical fibers perpendicularly to the base of the enclosure.

Apparatus and method to vertically route and connect multiple optical fibers

A packaging substrate is formed with staggered vias interconnecting fan-out circuitry for improved strength and rigidity. Embodiments of the present invention include substrates wherein less than 20% of the vias are aligned.

Packaging substrate comprising staggered vias

A tape automated bonding (TAB) tape is provided with an insulating tape having a die receiving section. The TAB tape also has a conductive wiring pattern forming a plurality of traces including a land at one end and a beam lead at another end. A tape window is formed in a portion of the tape die receiving section. At least one trace beam lead extends over the tape window from a first direction and is connected to a tie bar adjacent an opposing side of the tape window and at least one trace beam lead extends over the tape window from a second direction different than the first direction and is cantilevered over the tape window.

Micro-BGA beam lead connection with cantilevered beam leads

A packaging substrate is formed with electrically non-functional areas of Cu on the upper surface and/or lower surface for improved strength and rigidity and reduced warpage and bending. Embodiments of the present invention include substrates containing electrically non-functional grid-like Cu areas on the upper and lower surface such that the ratio of the total Cu area on one surface is about 55% to about 100% of the total Cu area on the other surface.

Cu-balanced substrate

Damage to and short circuiting of bond fingers on a substrate due to die-attach resin bleed is prevented, thereby increasing yield and improving reliability. Embodiments include forming a trough in a solder mask on a substrate between the bond fingers and semiconductor chip to prevent the die-attach resin from reaching the bond fingers.

Solder mask for controlling resin bleed

A method of simultaneously electroplating both sides of a dual-sided circuit board substrate having electrically connected, multi-trace circuit patterns formed on both sides of the substrate, without requiring formation and at least partial removal of electrically conductive tie bars and associated extensions, comprises steps of simultaneously electrically contacting each feature of a first one of the circuit patterns with a multi-fingered electrical contactor, and applying an electrical potential to the contactor to effect simultaneous electroplating on the circuit patterns on both sides of the substrate. According to an embodiment of the invention, the multi-fingered contactor comprises an array of electrically conductive wires, rods, or filaments extending from one surface of a metal plate. The invention finds particular utility in the fabrication of ball grid array (BGA) semiconductor device packages.

Simultaneous electroplating of both sides of a dual-sided substrate

A method of electroplating both sides of a dual-sided circuit board substrate having electrically connected, multi-trace circuit patterns formed on both sides of the substrate, without requiring formation and at least partial removal of electrically conductive tie bars, comprises steps of covering and electrically contacting a first one of the circuit patterns with a first layer of electrically conductive material, applying an electrical potential to the first layer of electrically conductive material to effect electroplating on the second one of the circuit patterns, removing the first layer of electrically conductive material, covering and electrically contacting the second one of the circuit patterns with a second layer of electrically conductive material, applying an electrical potential to the second layer of electrically conductive material to effect electroplating on the first one of the circuit patterns, and removing the second layer of electrically conductive material.

Electroplating both sides of a workpiece

A method of electroplating circuit board substrate having a high density, multi-trace circuit pattern formed on at least one major surface of an insulative substrate, without requiring formation and at least partial removal of a large plurality of electrically conductive tie bars contacting each of the circuit traces for supplying electroplating potential/current, comprises providing the at least one major surface with a single tie bar having at least a pair of laterally extending arms in simultaneous electrical contact with an end of each trace. Portions of the tie bar extension arms are selectively removed after completion of electroplating, e.g., by laser drilling or plasma etching, to electrically separate each of the circuit traces from the tie bar. According to an embodiment of the invention, electroplating is simultaneously performed on a dual-sided substrate including electrically interconnected circuit patterns formed on opposite sides thereof. The invention enjoys particular utility in the fabrication of ball grid array (BGA) semiconductor device packages.

Growing community of inventors

San Jose, CA, United States of America

Edwin Fontecha