Cirrus Logic Inc.

Rfmicron, Inc.

Crystal Semiconductor Corporation

Edwin De Angel

Lei Wang

Shahriar Rokhsaz

Wai Laing Lee

Chung-Kai Chow

Joel W Page

Hong Helena Zheng

Aryesh Amar

Axel Thomsen

Eric J Swanson

Rahul Singh

Sherry Xiaohong Wu

Jerome E Johnston

Jean Charles Pina

Prashanth Drakshapalli

Mohit Sood

Jorge Antonio Abullarade

Dale Brummel

Jie Fang

Hang Liu

Robert Leon Gorsegner

A power detector for use in an RF receiver. The detector includes a power reference generator and a power quantizer. The power reference generator develops a power reference current, voltage, or signal as a function of a power transferred via a received RF signal. The power quantizer is responsive to the power reference current, voltage, or signal to develop a digital field power value indicative of the power reference current, voltage, or signal.

Method and apparatus for detecting RF field strength

In an RFID system, a method and apparatus for linking an RFID tag to an associated object. The system includes a relatively simple tag, a reader, a linker, and a store. The reader interrogates the tag for an ID and selectively provides the ID to the linker. The linker, in turn, uses the ID to provide back to the reader an associated Uniform Resource Identifier ('URI'). The reader then forwards the URI to the store. In response, the store returns to the reader the object associated with the ID via the URI. The disclosed method and apparatus provide more efficient and secure tag authentication.

Method and apparatus for authenticating RFID tags

A radio frequency (RF) circuit comprises an antenna operably coupled to receive an RF signal, a power harvesting circuit operable to generate a first power source from the RF signal, a tank circuit coupled to the antenna and a tuning circuit. The tank circuit includes a selectively variable impedance and the tuning circuit is adapted to dynamically vary the selectively variable impedance of the tank circuit based on resonance of the RF circuit and frequency of the RF signal to substantially align the resonance of the RF circuit with the frequency of the RF signal. When the resonance of the RF circuit is substantially aligned with the frequency of the RF signal, the power harvesting circuit generates a second power source from the RF signal such that the second power source is greater than the first power source.

A method and apparatus for detecting RF field strength. A field strength reference generator develops a field strength reference current as a function of a field strength of a received RF signal; and a field strength quantizer develops a digital field-strength value indicative of the field strength reference current. In one embodiment, detected field strength is used to dynamically vary the impedance of a tank circuit whereby, over time, induced current is maximized.

A method and apparatus for detecting RF field strength. A field strength reference generator develops a field strength reference current as a function of a field strength of a received RF signal; and a field strength quantizer develops a digital field-strength value indicative of the field strength reference current. In one embodiment, detected field strength is used to dynamically vary the impedance of a tank circuit whereby, over time, induced current is maximized. In another embodiment, using the quantized field strength to sense changes to the environment to which the RFID tag is exposed.

A power measurement and calibration system provides power and line frequency measurements by using a bandpass filter having complex voltage and current outputs from which real and imaginary power components can be determined. Calibration of the filter may be omitted if a complex wavelet filter is used to implement the bandpass filter and a determination of line frequency can also be provided for downstream use. A processor receiving data from the output of the filter can compute real and imaginary power, power factor and the line frequency. The filter may be implemented by a processor executing program instructions, or a digital circuit implementing the filter and optionally a CORDIC rotator for computing the current-to-voltage phase relationship can provide input to the processor for power measurement and calibration of the sample rate to line frequency relationship and for other uses.

Complex wavelet filter based power measurement and calibration system

A method and apparatus for automatically securing non-volatile (NV) storage in an integrated circuit provides improved resistance to code copying and reverse-engineering attacks. External interfaces that provide read access to the NV storage are be disabled, for a predetermined time after a reset or other initialization signal is received. An internal lock state bit or key is checked as well as an external lock prevent indication. If the lock prevent indication is not received, or the internal lock state bit is already set, then the integrated circuit is operated under a locked condition, in which external access to the NV storage values is prevented. The lock prevent indication may be a signal provided during reset of the integrated circuit on a terminal that is used for another purpose after initialization of the integrated circuit.

Method and apparatus for automatically securing non-volatile (NV) storage in an integrated circuit

A method and apparatus for reducing switching noise in a system-on-chip (SoC) integrated circuit including an analog to digital converter (ADC) provides for reduced noise in the ADC conversions. Sampling circuits of the ADC are operated by sampling clock signals and digital circuits and other noise-generating circuits such as power converters, are operated by digital circuit clock signals. Both sets of clock signals are derived from the same master clock by a clock generator circuit, but an offset is applied in the clock generator circuit to move the edges of the digital circuit clock signals away from critical sampling intervals corresponding to edges of the sampling clocks. In one embodiment, the offset is applied by a processor core that forms part of the digital circuits by setting a value in the clock generator, which the clock generator then loads into the divider after halting the clock to the digital circuits.

Method and apparatus for reducing switching noise in a system-on-chip (SoC) integrated circuit including an analog-to-digital converter (ADC)

A network arrangement uses a poll select control protocol and a loop back arrangement at each node for equalizing transmission delay from each node to a central station. Delays at each node can be adjusted to start timing in response to a broadcast signal indicating an amount of delay to be applied from the start of a synchronization interval to the beginning of transmission of data collected at the nodes. The arrangement is particularly useful in the field of data acquisition and particularly in the area of seismic sensing.

Network synchronization

A power on reset circuit, preferably for an integrated circuit, detects application of voltage, starts a phase locked loop one application of voltage is detected but inhibits all clock used for digital logic operations until voltage stability is achieved. If a switched converter is used, the duty cycle of the switched converter is held at unity for a period of time before it is set to that needed to achieve the desired chip operating voltage. Clocks controlling other circuits can be released in stages after the duty cycle of the switched converter is set to its operating voltage level.

Power on reset techniques for an integrated circuit chip

The electrical circuitry for a multiplier system includes a counter for determining proximity to sampling operation, and a switch to select between symmetrical noise invariant operation and a low-power mode of operation. A noise invariant circuit disables row skip operation in a multi-row multiplier, to enable analog sampling. Disabling of the row skip operation is accomplished at a time which is several digital cycles preceding the time of analog sampling. Power saving multiplier row skippage resumes after analog sampling is completed.

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Austin, TX, United States of America

Edwin De Angel