Advanced Micro Devices Corporation

Edward Yang

Bahadir Erimli

Shashank C Merchant

Robert Alan Williams

John Mingyung Chiang

Ching Yu

Chandan Egbert

Ian Lam

Eric Tsin-Ho Leung

Xiaohua Zhuang

Vallath Nandakumar

Jinqlih Sang

A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that flexibly assigns memory access slots to access an external memory according to programmable information. A scheduler within an external memory interface assigns the memory access slots to the respective network switch ports according to a programmed sequence written into an assignment table memory from an external programmable data storage device.

Apparatus and method for programmable memory access slot assignment

A network switch configured for switching data frames across multiple ports utilizes an efficient arbiter to store the data frames. Each port possesses queuing logic for requesting a free pointer from a free buffer queue. A multi-level arbitration logic arbitrates all the requests of equal priority from the network switch ports in a round robin scheme. The arbitration logic comprises a plurality of cells that cascaded to output an acknowledgement signal in response to an inhibit signal and a request signal as well as a counter that is incremented upon an asserted acknowledgement signal.

Weighted round robin cell architecture

A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol dynamically allocates external memory bandwidth slots between high data rate ports. An external memory interface determines if a high data rate port makes a request for a bandwidth slot and grants the request if made. The slot is taken from a selected group which is a subset of the total number of slots. If a request for the slot is not made, the external memory interface assigns the slot to another high data rate port. Lower data rate ports in the network switch are assigned fixed slots from those slots not from within the selected group of slots. The dynamic allocation of bandwidth slots between the high data rate port enables the efficient use of limited memory bandwidth resources.

Apparatus and method in a network switch for dynamically assigning memory interface slots between gigabit port and expansion port

A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that allocates a prescribed number of external memory bandwidth slots between high data rate ports based on the compared amount of network traffic on the respective ports. A scheduler within an external memory interface initially assigns memory access slots to the respective high data rate ports according to a prescribed sequence. If the scheduler subsequently detects that the network data traffic on a port having less slots is higher than the traffic on a port having more slots, the slots are swapped between the high data rate ports. Additionally, a clock multiplexer in one of the high data rate ports adjusts the data rate of the port dependent upon the number of slots assigned to that port. The swapping of bandwidth slots between the high data rate ports along with the adjustment of the port clock rate enables the efficient use of limited memory bandwidth resources.

Apparatus and method in a network switch for swapping memory access slots between gigabit port and expansion port

A programmable split-queue structure includes a first queue area for receiving entries, a second queue area for outputting entries input to said first queue area, and a queue overflow engine logically coupled to the first queue area and the second queue area. The queue overflow engine functions to transfer entries from the first queue area to the second queue area using one of two transfer modes. The queue overflow engine selects the most appropriate transfer mode based on a prescribed threshold value that can be dynamically programmed. An overflow storage area having high capacity may be provided in an external memory in order to increase the overall capacity of the queue structure.

Split-queue architecture with a first queue area and a second queue area and queue overflow area having a trickle mode and an overflow mode based on prescribed threshold values

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San Jose, CA, United States of America

Edward Yang