Sony Trans Com Inc.

Sony Corporation

Hughes Aircraft Company

Sony Corportion

Edward W Scott

Toshiharu Fukui

Marc Booth

Kunjan Zaveri

Richard Sagey

Kaz Takata

Hussein F Akasheh

A boundary scan analog signal test circuit for boundary scan testing of analog signals. The boundary scan analog signal test circuit provides for known upper and lower bound values at specified times for testing whether sample analog signals are within the specified lower and upper bound values. If the sample analog signals are not between the known upper and lower bound values, the boundary scan analog signal test circuit produces a result flag indicating a 'not pass' for the device being tested. If the sample analog signal being tested is found to be within the known upper and lower bound values, then the circuit generates a result flag indicating that the device being tested has passed the test.

Boundary scan test method and apparatus

An interactive applications generator is utilized to generate an interactive application environment for use on a single server multi-client network computer system. The interactive applications generator permits a user to define a graphical user interface (GUI), that contains one or more display screens, for a customized interactive application environment. The interactive applications generator contains a screen template editor, a media frame editor, a screen editor, and an interactive presentation editor. The screen template editor is utilized to create generic screen templates, that contain generic screen template elements. The media frame editor is utilized to generate media frames by combining multimedia component elements in a time synchronized manner. The screen editor is utilized to generate the display screens including assigning functionality. In order to create a unique instance for each display screen for a particular interactive applications environment, the screen editor references generic screen templates and media frames. The interactive presentation editor is utilized to create the hierarchical structures that defines presentation of the display screens for the particular interactive presentation environment.

Interactive applications generator for an interactive presentation

Digital data is stored in a buffer, and a data buffer CRC word is generated for error detection. Error correction is provided by a set of XPQ circular queues ('XPQs') used to compute an error correction syndrome. As each word is loaded into the data buffer, it is also XORed into each of the XPQs. An XPQ CRC is generated for error detection in the XPQs. The complete data packet may be transmitted or stored for later retrieval. Upon receipt or retrieval, the packet is decoded and checked for errors. The incoming data is read into a second buffer and a new CRC is generated. If the incoming CRC matches the new CRC, no errors exist and no further checking or correction is needed. If the CRCs do not match, the incoming data is used to generate new XPQ' queues and a new XPQ CRC. If the incoming XPQ CRC matches the new XPQ CRC, then the error may be correctable. XPQ imprinter circular queues ('IQ') are formed by XORing each word of the incoming XPQs with the words of the new corresponding XPQs. Intermediate correction masks are then created by sequentially writing the contents of each IQ to intermediate correction mask buffers. A single XPQ correction mask is then formed by ANDing each corresponding word of each intermediate correction mask buffer together. The correction mask is evaluated and if the errors are determined to be correctable, correction is achieved by XORing each corresponding word in the XPQ correction mask with the incoming data.

Method and apparatus for detection and error correction of packetized

A detector and locator system monitors sequential signals to detect and locate events. In a fault detector and locator embodiment, the system monitors the sequential states of multiples signals to detect a fault and to locate the source of a fault. A Hamming encoder compresses the sequential signal to reduce the number of signature generators. Signature generators further compress the encoded signals to reduce an enormous number of states contained in the sequence of monitored signals to a relatively small set of signatures. A parity detector monitors the signature signals to generate a fault detection signal. A location circuit monitors the signature signals to generate a fault location signal.

Growing community of inventors

Anaheim Hills, CA, United States of America

Edward W Scott