Lsi Logic Corporation

Edward W Liu

See-Hoi Caesar Wong

Qasim R Shami

Subrat Mohapatra

A method of canceling noise in analog circuits is described along with noise cancellation circuits. Analog circuits are sensitive to noise. Especially in mixed signal environments where digital circuits and analog circuits are combined, the noise generated by relatively noisy digital circuits often cause the analog circuits to produce incorrect output signals. Instead of shielding or separating the susceptible analog circuits from noisy digital circuits, additional circuitry is added where one of the added circuits, denoted as the noise separator circuit, produce only the noise component of the output signal, the first output, of the analog circuit adversely affected by the noise. Then, another circuit is used to subtract the noise from the first output, thereby producing a noise-free output signal. Alternatively, the noise separator circuit can be made to produce the inverse of the first output, including the inverse of the noise. Then, the first output and the inverse output can be added and halved to produce the desired, noise-free output.

Noise cancellation in mixed signal environment

A transmission system for transmitting a signal from a host to a transmission medium is disclosed. The transmission system includes a current-mode digital-analog converter, an on-chip low-pass filter, a line driver, and output impedance control. Further, a method for transmitting a signal from a host to a transmission medium using on-chip filtering is disclosed. More specifically, an apparatus and method for providing precise control of the filter cut-off frequency at high frequencies is disclosed. The transmission system and method can be used in transmission of Ethernet signals onto an unshielded twisted pair cable. In addition, with appropriate modification, the transmission system and method can be used for transmitting ATM or other signals onto a transmission medium.

Integrated filter tuning method and apparatus

The present invention provides for a shielded capacitor in a digital CMOS fabrication process. The shield capacitor comprises a first surface (also known as a top plate) and a second surface (the bottom plate). The bottom plate has two portions which are connected, and the two portions of the bottom plate are positioned to sandwich the top plate in between the portions. A polysilicon layer is fabricated between the plates and the substrate of the semiconductor to isolate the plates from the substrate. To build the shielded capacitor, the polysilicon layer is fabricated first, then the plates are built on top of the polysilicon layer. The polysilicon layer is silicized and is often connected to the ground.

Capacitors with silicized polysilicon shielding in digital CMOS process

A transmission system for transmitting a signal from a host to a transmission medium is disclosed. The transmission system includes a current-mode digital-analog converter, an on-chip low-pass filter, a line driver, and output impedance control. Further, a method for transmitting a signal from a host to a transmission medium using on-chip filtering is disclosed. The transmission system and method can be used in transmission of Ethernet signals onto an unshielded twisted pair cable. In addition, with appropriate modification, the transmission system and method can be used for transmitting ATM or other signals onto a transmission medium.

Current mode ethernet transmitter

A user control system for allowing an end user to control the level of a signal transmitted from a host to a transmission medium is disclosed. The user control system includes a digital current controller electrically connected to a bias voltage generator, and formed of a binary weighted transistor array that is switched according to user inputs received from a host. Also disclosed is a transmission system incorporating the user control system and further including a current-mode digital-analog converter, an on-chip low-pass filter, a line driver, and output impedance control. Further, a method for optimizing the output signal through user control is disclosed. The control system and method can be used in transmission of Ethernet signals onto an unshielded twisted pair cable. In addition, with appropriate modification, the transmission system and method can be used for transmitting ATM or other signals onto a transmission medium.

Transmission system having adjustable output signal levels utilizing

A analog-to-digital conversion apparatus and method for mobile communication devices are disclosed by the present invention. Because the conventional CMOS process does not allow for high order anti-aliasing circuits to be fabricated with digital circuits on the same chip, a new apparatus had to be developed to use low order anti-aliasing filters for the analog-to-digital conversion. The apparatus of the present invention includes a low order anti-aliasing circuit, a delta-sigma converter, and post-conversion filters. The post conversion filters include a decimation circuit, a droop correction filter, and an offset adjust circuit. In this implementation, a low order analog anti-aliasing filter can be used along with a delta-sigma converter and post-conversion filters to eliminate the need for high order analog anti-aliasing filters. Another aspect of the present invention is the duplication of the circuits to process the incoming signals. The duplicate circuit is fed a null signal to process the noise only. Then, the processed noise is subtracted from the processed signals, which contain the information plus noise, to obtain a noise free processed signal.

Apparatus and method of fabricating mixed signal interface in GSM

A novel device for pole splitting which can be employed in multistage amplifiers having a final stage and a prior stage. The device comprises a first capacitor connected between the output of the prior stage and the output of the final stage, a source follower, and a second capacitor connected between the output of the prior stage and the source follower. The source follower provides an offset voltage that reduces variation of the total capacitance of the first and second capacitors. In a preferred version of the present invention, the first and second capacitor each comprise a MOSFET transistor having a certain threshold voltage. The offset voltage is set to be at least the threshold voltage of the MOSFET transistors. In a preferred version, the source follower comprises a plurality of MOSFET transistors, which includes a MOSFET transistor having a gate connected to the first capacitor and a source connected to the second capacitor.

Device for pole splitting in amplifiers

A novel signal processing scheme comprises a digital to analog converter which is clocked at a first frequency, and a switched capacitor filter which receives input from the digital to analog converter and is clocked at a second frequency which is a multiple N times the first frequency. A preferred version of the present invention further comprises an analog signal sychronization circuit which allows the switched capacitor filter to oversample output from the digital to analog converter. The analog signal sychronization circuit comprises a sample and hold circuit, which receives input from the digital to analog converter and holds the input so that the switched capacitor filter can sample the same input N times, and a digital clock generator, which clocks the sample and hold circuit such that the sample and hold circuit only samples settled and valid output data from the digital to analog converter. An RC active filter receives input from the switched capacitor filter and rejects signal images at the first and higher frequencies.

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Sunnyvale, CA, United States of America

Edward W Liu