Dallas Semiconductor Corporation

Maxim Integrated Products, Inc.

Edward Tang Kwai Ma

Stephen N Grider

Frank V Taylor, Iii

Joseph P Gorski

Ann Little, Legal Representative

Andrew D Jones

Ann Little

Sai Bun Samuel Wong

A secure microcontroller system comprising an integrated cache sub-system, crypto-engine, buffer sub-system and external memory is described according to various embodiments of the invention. The secure microcontroller incorporates block encryption methods to ensure that content communicated between the integrated microcontroller and external memory is protected and real-time performance of the system is maintained. Additionally, the microcontroller system provides a user-configurable memory write policy in which memory write protocols may be selected to balance data coherency and system performance.

Block encryption security for integrated microcontroller and external memory system

Methods, systems, and arrangements enable increased security for a processor, including by implementing block encryption. The block may include multiple instructions and/or operations to be executed by the processor. The block may also include multiple bytes that are read into the processor byte by byte. Once a block-wide encrypted buffer has been filled from an external memory source, the block may be decrypted using an encryption algorithm (e.g., the Data Encryption Standard (DES), the triple DES, etc.), and the decrypted block may be forwarded to a decrypted buffer. The decrypted block may thereafter be moved into a cache, which may optionally be organized into an equivalent block width (e.g., for each way of a multi-way cache). Therefore, when a processing core/instruction decoder needs a new instruction, it may retrieve one from the cache, directly from the decrypted buffer, or from external memory (e.g., after undergoing decryption).

Encryption-based security protection for processors

Methods, systems, and arrangements enable efficient reprogramming of a memory block of a microcontroller. Two blocks of memory each have a different logical location with respect to a processor of the microcontroller. The first memory may store vector information to be executed by the processor. The second memory may store data information. The logical location of each memory block is dependent on the value of a pre-determined bit in a specified register. When a user wishes to reprogram the contents of the first memory, the user enters new code into the second memory. Upon completion, the value of the pre-determined bit is changed, and the logical locations of the first and second memories are interchanged. In effect, the newly entered code from the second memory is accessed as if it were in the first memory (e.g., from an addressing perspective), and the processor may execute the new program (e.g., after the processor undergoes a system reset).

Memory exchange

A microcontroller integrated circuit incorporating a user configurable pulse width modulator. The pulse width modulator circuitry is configurable to be a single, for example 32-bit pulse width modulator, or a plurality of pulse width modulators each having a bit width that is divisible by the single 32-bit pulse width modulator (e.g., 2, 4, 8 or 16-bit pulse width modulators).

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Plano, TX, United States of America

Edward Tang Kwai Ma