Keyssa Systems, Inc.

Lattice Semiconductor Corporation

Silicon Image Gmbh

Other

Sandcraft, Inc.

Rmi Corporation

Raza Microelectronics, Inc.

Edward T Pak

Mayank Gupta

Roger Dwain Isaac

Dongyun Lee

John Hahn

Javier Villagomez

Alan T Ruberg

Paul Heninwolf

Peter H Voss

Sung Soo Park

Wei-Ping Lu

Jeff Cuppett

Tejvansh Singh Soni

Victor Shadan

Sung Man Park

Jung Wook Cho

Sangwan Kim

Sukjae Cho

Sivakumar Doraiswamy

Byoung Woon Kim

Yuan-ping Chen

Methods, systems, and apparatus for EM communications. One of the methods includes determining, at a first device, that a second device is present; initiating a half duplex communication with the second device; configuring communication with the second device including determining whether full duplex communication is available; in response to a determination that full duplex communication is not available, communicating with the second device in half duplex mode; and in response to a determination that full duplex communication is available, communication with the second device in full duplex mode.

Multi-protocol contactless communication

A universal protocol engine circuit aggregates data of multiple communication ports that may use different communication protocols according to a configurable communication protocol. In a transmitter mode, the universal protocol engine circuit references a slot table defining a sequence of the ports to generate output data from the input data received from the ports, and transmits the output data over a wired or wireless communication link. In a receiver mode, the universal protocol engine circuit references the slot table to parse input data from the communication link into output data for each of the ports. The sequence of ports of the slot table may be configurable according to the speed or other properties of the communication ports.

Virtual pipe for connecting devices

A system, such as a server rack, includes rack mountable devices that communicate using one or more extremely high frequency (EHF) communication devices. A rack mountable device includes a rack mountable chassis including multiple sides, and a circuit board along a side of the rack mountable chassis, the circuit board having a surface. The EHF communication devices are positioned along the side of the rack mountable chassis and attached to the surface of the circuit board. Each of the EHF communication devices is configured to convert between an EHF electromagnetic signal and an electrical data signal. The EHF communication devices form EHF communication channels with other EHF communication devices in other rack mountable devices, or in the server rack to provide high bandwidth data transfer utilizing space on the sides of the rack mountable device.

Computing devices using extremely high frequency (EHF) electromagnetic communication

A system for delivering power over a network of devices connected through a serial link includes a first and second differential pairs of wires. Each differential pair of wires is double AC coupled by a HPF on one side and by another HPF on an opposite side. An LPF connects a portion of each differential pair of wires between the HPFs to a voltage source, and another LPF connects that portion of each differential pair to a load. The system further includes a third and fourth differential pairs of wires. All four differential pairs of wires are located within a single cable, such as a CAT6 cable. The first, second and third differential pair of wires are used for video links, and the fourth differential pair of wires are used for the bi-directional hybrid link. A power delivery circuit in each device includes a voltage source, a power relay switch, a signature resistor for detection, and a load detector.

Power delivery over digital interaction interface for video and audio (DiiVA)

A system may include a video link and a hybrid link that connects a transmitting device to the receiving device, and at least one intermediate hop between the transmitting device and the receiving device. The intermediate hop may be configured to relay video content from the video source to the video sink through the hybrid link using one or more data relay modes. The hybrid link may be configured to perform hybrid link control signaling (HLCS) to manage a physical layer of the hybrid link. The video link between the video source and the video sink may be configured to transmit a video stream the from video source to the video sink over one or more video lanes. A video link training may be implemented for the video link and the hybrid link.

Video management and control in home multimedia network

The invention provides a cache architecture that selectively powered-up a portion of data array in a pipelined cache architecture. A tag array is first powered-up, but the data array is not powered-up during this time, to determine whether there is a tag hit from the decoded index address comparing to the tag compare data. If there is a tag hit, during a later time, a data array is then powered-up at that time to enable a cache line which corresponds with the tag hit for placing onto a data bus. The power consumed by the tag represents a fraction of the power consumed by the data array. A significant power is conserved during the time in which the tag array is assessing whether a tag hit occurs while the data array is not powered-on at this point.

Low-power cache system and method

A content addressable merged queue (camQ) architecture for high-speed switch fabrics reduces the memory requirement for crossbar switch input and output queues using memory cells and age tag comparators. CamQ emulates VOQ FIFO for each supporting priority, eliminating HOL blocking. Multiple QoS levels are supported cost effectively at higher traffic bandwidth limits. Content addressable memory (CAM) cells store payload destinations, which can be addressed by cell priorities. Once a priority for QoS is decided, all the cells with the selected priority in the payload can make connection requests to destination ports directly through the CAM structure. An age tag is assigned to incoming cells and fast age tag comparators provide FCFS features by selecting the oldest cell. Small memory sizes prevent the bottlenecking in ingress and egress queues. A CIOQ crossbar has a fast switching speed, emulating a FIFO output queue switch. Age and priority are interleaved to schedule switching.

Age selection switching scheme for data traffic in a crossbar switch

The invention provides a dynamic domino circuit that is robust under noisy condition. The invention also provides a dynamic adder that contains nodes that can produce true dynamic inversion without compromising area or speed. The invention further improves speed of the adders by cutting the latch delay while not requiring complex clocking.

Dynamic circuit using exclusive states

The invention provides a system and method for executing a replacement selection algorithm embedded in each associativity of a cache memory architecture. Each associativity in a cache has an internal control logic that governs the process for replacing a cache line when a certain condition occurs, such as a presence of a TagHit. A designated set of control signals is used in an associativity control logic for corresponding with an external control logic. An associativity control logic within an associativity provides an internal capability to determine whether a TagHit condition occurs as well as volunteering the associativity for replacement. The preferred replacement algorithm is implemented using an approximation to Not the Most Recently Used Associativity (NMRU).

Scalable replacement method and system in a cache memory

A method and a device for maintaining logic state stored in a storage device are described. For one embodiment, the device precharges at least two complimentary nodes in a storage device during the precharge cycle. During the evaluation cycle, the device receives an input data. After receipt of the input data, device stores at least one logic state at a storage node according to the input data. The device includes at least one conducting path to limit one store per each evaluation stage.

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Saratoga, CA, United States of America

Edward T Pak