Texas Instruments Corporation

Edward P Kuzemchak

Christophe Favergeon-Borgialli

Christine M Cipriani

Mary P Luley

Leland J Szewerenko

John L Tibbits

Deborah C Keil

Gerald K Coley

Edmund D Zink

The invention relates to a software system and method for automatically verifying the correct execution of an application ported from one instruction set architecture (ISA) to another ISA. In this method, versions of the application are prepared for the two ISAs. Each version is then executed in a simulator or emulator for the appropriate ISA and the results of any change in memory made during the execution are compared. If each memory change made during the execution of the target version of the application is found to be equivalent to a memory change made during the execution of the source version of the application, the execution of the target (or ported) application is verifiably correct.

Method and tool for verification of algorithms ported from one instruction set architecture to another

The invention relates to a method to increase the visibility of effective address computation in pipelined architectures. In this method, the current effective address delay of each instruction in the pipeline is calculated. The current effective address delay is used to determine if a valid effective address is available for each instruction. If a valid effective address for an instruction is not available, it is computed if possible.

Method for enhancing the visibility of effective address computation in pipelined architectures

A graphical solutions development system using placement of blocks representing hardware/software functionality on a computer screen drawing and connecting the blocks by wires representing data and control flow to create application programs and/or hardware design. The blocks are instances of development components that include intelligence for optimization within a detected environment. This permits effective programming of digital signal processors and system design by users not expert in digital signal processing programming and system design.

Graphical development system and method

A collection of program instructions capable of executing on a host processor suitable for reading from a memory location of a target processor and suitable for creating a real-time data channel between said host and target processors.

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Avonmore, PA, United States of America

Edward P Kuzemchak