Psemi Corporation

Peregrine Semiconductor Corporation

Murata Manufacturing Co., Ltd.

Edward Nicholas Comfoltey

Michael Conry

Jaroslaw E Adamski

Dan William Nobbe

Jingbo Wang

Naveen Krishna Yanduru

Jianhua Lu

Chieh-Kai Yang

Kevin Roberts

William R Smith

Peter Bacon

Jeffrey A Dykstra

William Richard Smith, Jr

Emre Ayranci

Miles Sanner

David Alan Podsiadlo

Jaroslaw Adamski

Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.

Phase-change material switches

An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.

Integrated tunable filter architecture

Methods and devices to control PCM switches are disclosed. The described devices include PCM switch drivers and logic and control circuits, all integrated with the PCM and the associated heater on the same chip. Various architectures for the driver are also presented, including architectures implement feedback mechanism to mitigate variations from process, temperature, and supply voltage.

Integrated PCM driver

A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CEelectrically connected from a signal node of LE to a control input of LE, and a second coupling element CEelectrically connected from the control input of LE to a nominal node of LE. An initial bias (control) voltage is also supplied to the control input of LE to dynamically control the limiting threshold for the limiter. Embodiments include usage of self-activating adjustable power limiters in combination with series switch components in a switch circuit in lieu of conventional shunt switches.

Integrated switch and self-activating adjustable power limiter

A FET-based RF switch architecture and method that provides for independent control of FETs within component branches of a switching circuit. With independent control of branch FETs, every RF FET in an inactive branch that is in an 'open' (capacitive) state can be shunted to RF ground and thus mitigate impedance mismatch effects. Providing a sufficiently low impedance to RF ground diminishes such negative effects and reduces the sensitivity of the switch circuit to non-matched impedances.

Independent control of branch FETs for RF performance improvement

Self-activating adjustable power limiter

Circuits and methods for efficient interconnect layout of multiple circuit elements, including integrated circuits (ICs), within a circuit module, while enabling only a single control/status (C/S) connection per module. In a first embodiment, the C/S interfaces of multiple ICs are configured in parallel within a multi-IC module, and coupled through a single module serial bus to a system C/S serial bus. In a second embodiment, the C/S interface of a primary IC is coupled through a single module serial bus to a system C/S serial bus, while a secondary IC is internally serially coupled to a 'pass through' interface of the primary IC. In a third embodiment, a dynamic address translation circuit translates device and register address information provided by a master device into corresponding internal addresses, and re-directs command messages from a system C/S serial bus to internal slave devices.

Serial-bus interface for multi-die module

A high performance low noise amplifier integrated circuit having multiple low noise amplifiers enabling operation over a wide range for frequencies is disclosed. In particular, an auxiliary input is provided to the low noise amplifier integrated circuit that can be routed to one of several low noise amplifiers, each tuned to operate efficiently in different frequency ranges.

Optimized multi-LNA solution for wideband auxiliary inputs supporting multiple bands

Growing community of inventors

San Diego, CA, United States of America

Edward Nicholas Comfoltey