Pmc-sierra, Inc.

Integrated Telecom Technology

Edward Lennox

Brian D Holden

Imran N Chaudhri

Denis A Smetana

Richard A Smedley

Imran Chaudhri

A segmentation and reassembly processor ( ) is disclosed for use in interfacing a group of time-division multiplexed lines ( ) to a cell-based communication environment ( ). The SAR uses a bit-table calendar ( ) to schedule cells to be sent to the cell-based network. A cell service decision circuit ( ) reads frame events from a frame advanced FIFO ( ) and signals a cell builder ( ) to assemble cells of data from a frame buffer ( ) for transmission to a cell based output ( ).

Asynchronous bit-table calendar for ATM switch

A segmentation and reassembly processor (10) is disclosed for use in interfacing a group of time-division multiplexed lines (25) to a cell-based communication environment (20). The SAR uses a bit-table calendar (100) to schedule cells to be sent to the cell-based network. A cell service decision circuit (50) reads frame events from a frame advanced FIFO (40) and signals a cell builder (60) to assemble cells of data from a frame buffer (70) for transmission to a cell based output (50).

Growing community of inventors

Saratoga, CA, United States of America

Edward Lennox