Ovonyx Inc.

Other

International Business Machines Corporation

Edward J Spall

Tyler A Lowrey

Guy Charles Wicker

Wolodymyr Czubatyj

Stephen J Hudgens

Roberto Bez

Giulio Casagrande

Thomas M Storey

An electronic device including a breakdown layer having variable thickness. The device includes a variable resistance material positioned between two electrodes. A breakdown layer is interposed between the variable resistance material and one of the electrodes. The breakdown layer has a non-uniform thickness, which serves to bias the breakdown event toward the thinner portions of the breakdown layer. As a result, the placement, size, and number of ruptures in the breakdown layer are more consistent over a series or array of devices. The variable resistance material may be a phase-change material. The variable-thickness breakdown layer may be formed through a diffusion process by introducing a gas containing a resistivity-enhancing species to the environment of segmented variable resistance devices during fabrication. The resistivity-enhancing element penetrates the outer perimeter of the variable resistance material and diffuses toward the interior of the device. The resistivity-enhancing species increases the resistance of the interface between the variable resistance material and the electrode by interacting with the variable resistance material and/or electrode to form a resistive interfacial material. Based on the diffusional nature of the process, the concentration of the resistivity-enhancing species decreases toward the center of the device and as a result, the breakdown layer is thinner toward the center of the device.

Breakdown layer via lateral diffusion

A method of customizing an integrated circuit chip, comprising the steps of: providing an electronic circuit on said chip; providing a phase-change memory on the chip; storing information about said electronic circuit in the phase-change memory. A method of operating an optical display.

Die customization using programmable resistance memory elements

A non-volatile memory latch may be formed with a phase change memory layer. Such a latch may be faster and more easily integrated into main stream semiconductor processes than conventional latches that use non-volatile memory elements such as flash memory.

Phase change memory latch

A memory device including a plurality of memory cells, a plurality of insulated first regions of a first type of conductivity formed in a chip of semiconductor material, at least one second region of a second type of conductivity formed in each first region, a junction between each second region and the corresponding first region defining a unidirectional conduction access element for selecting a corresponding memory cell connected to the second region when forward biased, and at least one contact for contacting each first region; a plurality of access elements are formed in each first region, the access elements being grouped into at least one sub-set consisting of a plurality of adjacent access elements without interposition of any contact, and the memory device further includes means for forward biasing the access elements of each sub-set simultaneously.

Memory device

A multichip module (MCM) and associated fabrication technique are presented wherein a test circuit is disposed within the interposer substrate of the MCM to facilitate testing of the module's integrated circuit chips and testing of the interconnect wiring between integrated circuit chips. The test circuitry, disposed within the interposer substrate comprises semiconductor logic circuitry that electrically connects to the integrated circuit chips of the module. In the various multiplexer latch and shift register latch embodiments disclosed, active test circuitry within the interposer substrate is minimized and is essentially transparent to the integrated circuit chip designs incorporated in the MCM.

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Manassas, VA, United States of America

Edward J Spall