Alcatel Internetworking, Inc.

Edward C Szajner, Jr

Arthur L Zaifman

Stephen J Ciavaglia

Edward Spang

&ldquo;Per memory&rdquo; atomic access for a distributed memory multiprocessor architecture is provided by marking bit masks for shared memories to indicate the access privileges of processors to the memories. A processor has access privileges to a shared memory if the bit mask retained for the memory is marked at a bit position reserved for the processor and does not have access privileges if the bit mask is not so marked. A bit mask is permitted to have only one mark at a given time to guarantee that access to each shared memory is atomic.

Per memory atomic access for distributed memory multiprocessor architecture

Shadow arrays are configured in a distributed memory multiprocessor architecture to localize memory referencing. As each additional processor becomes active a variable array having dimensions 1&times;N, including N single instance variables which must be monitored on a &ldquo;per processor&rdquo; basis, is configured in a memory local to the additional processor and made locally referenceable. A patchwork of shadow arrays is thereby established in which each additional processor may reference local memory to access its own value set for the N single instance variables. The single instance formatting of the arrays also advantageously facilitates migration from an single processor operating system to a multiprocessor operating system without substantial recoding.

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Leominster, MA, United States of America

Edward C Szajner, Jr