Intel Corporation

Other

International Business Machines Corporation

Edward Butler

Gary A Solomon

Joseph A Schaefer

Robert Tamlyn

Paul S Levy

John C Thomas

Oleg Awsienko

David E Mayhew

David B Minturn

Todd Comins

Endre P Thoma

Mark E Schuelein

Lynne Michelle Brocco

Gary L McAlpine

Hemen R Shah

Ronald A Sasaki

Wayne Frederick Ellis

Mark D Summers

Peter Munguia

Karl H Mauritz

Alfred L Sartwell

Theodore M Redman

David W Frame

Martin B Lundberg

Christopher J Banyai

Pushkar U Mokashi

Robert B Goodwin

A method and system provided for a single-action with which the customer places an order and receives goods by the single action of connecting an electrical vehicle (EV) to a charging station according to the business terms associated with this invention, the affiliated organizations that purchase or support the operation of the invention participate in a business 'franchise' operation whereby all affiliated organizations increase their revenues as the volume of EV charging events increases.

Method and system of billing for charging a vehicle battery leveraging a single connection action

A method and system is provided in which an electric automotive charging station connects to the host computer system using un-dedicated network resource contained within the electric vehicle to be charged enabling un-supervised (non-networked) deployment of said charging stations.

Method and process of administrating recharging of electric vehicles using low cost charge stations

As the density of Electric Vehicle deployments in residential neighborhoods increase, demand on local power grids may exceed the local utility power supply causing local brown outs or transformer failure. The invention describes a method and process which enables the acquisition and efficient RF transmission of data that enables utility customers, utilities and/or other controlling entities to collaboratively regulate the timing and rate of Electric Vehicle battery charging in a manner that avoids peak-load related transformer failures.

Method and process for acquiring and delivering electric vehicle owner-operator preference data which is used to schedule and regulate the charging of multiple electric vehicle batteries within a shared local power distribution network

A multiple-domain processing system includes a multi-dimensional switching fabric to provide intra-domain and inter-domain communication within the system.

Multiple-domain processing system using hierarchically orthogonal switching fabric

A method for accessing a configuration space of a device is described. The method includes setting a first field of a packet to a value to specify a destination device, and setting a second field of the packet to a defined value to indicate that the packet is a configuration access packet. The method further includes setting a third field of the configuration access packet to a value to select one of a plurality of configuration apertures of a configuration space of the destination device, and setting a fourth field of the configuration access packet to a value to address a specific memory location within the selected aperture.

Configuration access mechanism for packet switching architecture

A queuing mechanism is described for managing packets between agents of a computer system. The queuing mechanism includes an ordered queue including a plurality of queue registers to store a plurality of packets. The queuing mechanism also includes a bypass queue coupled to the ordered queue, wherein, if a packet at head of the ordered queue is a delayed request and is stalled for lack of flow control credit, then the stalled packet is moved into the bypass queue.

Deadlock avoidance queuing mechanism

A switching fabric handles transactions using a protocol that directs packets based on path routing information. Components participate in transactions using a protocol that issues packets based on physical location of a destination device over the switching fabric, by establishing a virtual link partner relationship between the components.

Power management over switching fabrics

Embodiments of a method and/or apparatus for a switch fabric in a data transport system are disclosed.

Method and apparatus for a switch fabric in a data transport system

According to some embodiments, a system includes a holder to hold an electrical module, the module having an electrical circuit and a conductive module pad electrically coupled to the electrical circuit. A system may also include a flexible circuit coupled to the holder and having a conductive pad to contact the conductive module pad.

System to mount electrical modules

According to one embodiment a computer system is disclosed. The computer system includes a central processing unit (CPU) and a memory device, coupled to the CPU. The memory device includes a charge pump circuit to amplify a first voltage, and a voltage detection circuit coupled to the charge pump circuit to disable the charge pump circuit if a second voltage is detected.

Voltage detect mechanism

A method of self-refresh in a memory array includes initializing a programmable refresh counter of a memory module to an offset value from at least another memory module in the memory array. A data line carrying a system-wide self-refresh indicator signal is interrogated to determine whether any memory module is in a self-refresh mode. The self-refresh mode for the memory module is entered if the programmable refresh counter indicates that a self-refresh cycle is due, and it is determined that no other memory modules are in the self-refresh mode.

Method of self-refresh in large memory arrays

In a gate array having a plurality of free transistors and target transistors, a method and apparatus for protecting a gate electrode of a target transistor from gate charge by employing a free transistor as a gate electrode protection device. A target transistor is a transistor that has been determined to need gate charging protection. A free transistor is a transistor in the gate array which is not used to implement the logic design as embodied in the gate array. Initially, a base array is formed without any metal layers. Then, a determination is made as to which transistors require gate charging protection. The gate electrode of each target transistor determined to require gate charging is coupled to an associated drain or source electrode of a free transistor of the gate array. The gate electrode of the free transistor is connected to an appropriate voltage reference to turn the free transistor off.

Method and apparatus for protecting gate electrodes of target

The present invention discloses a system and method of testing semiconductor memory devices formed as integrated circuits on semiconductor substrates. The present invention allows parallel testing of arrays using only one input/output (I/O or DQ) to write to the arrays and only two DQs to read from the arrays. The broad search should be directed to methods of compressing the time and number of I/O's required for testing wide, high pin count, or highly partitioned memory arrays. The specific method of this invention comprises simultaneously writing the same test bit to each array, simultaneously reading a common address from each array and comparing the output of each array to report a fail if all outputs are not the same.

Growing community of inventors

Chandler, AZ, United States of America

Edward Butler