Lsi Logic Corporation

Linear Technology Corporation

Other

National Semiconductor Corporation

Edson Wayne Porter

Todd A Randazzo

Brian E Burdick

Kalin Valeriev Lazarov

Matthew Joseph Maloney

Iulian Constantin Gradinariu

Scott C Savage

William K Petty

Matthew S Von Thun

Craig M Davis

Robert Chiacchia

Hoang P Nguyen

Gregory Jon Manlove

Kevin J Bruno

Matthew Russell

David Lindsay Broughton

Raymond Allen Stevens

Hengsheng Liu

Kenneth Stanley Szajda

Wan Wah Loh

Stephen R Burnham

Christopher Pollard

A power control system includes an event data bus configured to carry event information. Several power supply managers are coupled to the same event bus. Each power supply manager has one or more point of load (POL) regulators assigned to it. Each power supply manager communicates event information with other POL power supply managers over the event data bus.

Power supply system and method

In one embodiment, a current sensing circuit corrects for the transient and steady state temperature measurement errors due to physical separation between a resistive sense element and a temperature sensor. The sense element has a temperature coefficient of resistance. The voltage across the sense element and a temperature signal from the temperature sensor are received by processing circuitry. The processing circuitry determines a power dissipated by the sense element, which may be instantaneous or average power, and determines an increased temperature of the sense element. The resistance of the sense element is changed by the increased temperature, and this derived resistance Rs is used to calculate the current through the sense element using the equation I=V/R or other related equation. The process is iterative to continuously improve accuracy and update the current.

Accurate current sensing with heat transfer correction

A monolithic voltage reference circuit may include a voltage-mode band-gap reference circuit, a temperature independent differential current source, and a temperature dependent differential current source. The voltage-mode band-gap reference circuit may include an error amplifier having differential input nodes. The temperature independent differential current source may be configured to add in or subtract from the differential input nodes a substantially temperature independent differential current with an allocation between the nodes that is controlled by a selectable output voltage trim setting. The temperature dependent differential current source may be configured to add in or subtract from the differential input nodes a substantially temperature dependent differential current with an allocation between the nodes that is controlled by a selectable temperature drift trim setting.

Voltage-mode band-gap reference circuit with temperature drift and output voltage trims

A single stage current sense amplifier is described that generates a differential output that is proportional to a current through a sense resistor. The voltage across the sense resistor is Vsense. The current sense amplifier includes a differential transconductance amplifier having high impedance input terminals. An on-chip RC filter filters transients in the Vsense signal. A feedback circuit for each leg of the amplifier causes a pair of input transistors to conduct a fixed constant current irrespective of Vsense, which stabilizes the transconductance. A gain control resistor (Re) is coupled across terminals of the pair of input transistors and has Vsense across it. The current through the gain control resistor is therefore Vsensex1/Re. A level shifting circuit coupled to each of the input transistors lowers a common mode voltage at an output of the amplifier. Chopper circuits at the input and output cancel any offset voltages.

High side current sense amplifier

A current sensor is disclosed. The current sensor includes a leadframe having a die paddle, a portion of the die paddle being configured as a resistive element through which current can flow, and an integrated circuit (IC) die attached and thermally coupled to the die paddle. The IC die includes a current sensing module configured to measure a voltage drop across the resistive element and convert the voltage drop measurement to a current measurement signal and a temperature compensation module electrically coupled to the current sensing module. The temperature compensation module is configured to adjust the current measurement signal to compensate for temperature-dependent changes in the resistive element. The temperature compensation module includes a temperature-sensitive element, with a portion of the temperature-sensitive element located directly over a portion of the resistive element.

Current sensor using leadframe as sensing element

An apparatus comprising a first plurality of parallel switches and a second plurality of parallel switches. The first plurality of parallel switches may be configured to control a voltage on a first output pin. The second plurality of parallel switches may be configured to control a voltage on a second output pin. The first and second pluralities of parallel switches may be configured to provide rise time control of a differential waveform and be driven by a phased data signal.

Programmable transmit SCSI equalization

A level shifter circuit configured for use between a core of a chip and input/output transistor of the chip in order to shield low voltage devices residing on the core. The level shifter circuit includes voltage tolerant native devices which have VDDCORE on their gates, and each voltage tolerant native device is cascoded with a low voltage transistor on the core.

CMOS level shifters using native devices

An apparatus comprising a device and a resistor. The device generally comprises (i) a gate configured to receive an input voltage, (ii) a drain coupled to a first supply voltage, and (iii) a source coupled to an output. The resistive element is generally coupled between the source and a second supply voltage. The apparatus generally provides voltage tolerance between the input voltage and the output.

Five volt tolerant and fail safe input scheme using source follower configuration

A gain control for a phase locked loop circuit is provided. In the phase-locked loop circuit, a voltage controlled oscillator generates a reference signal responsive to the level of a tuning voltage. A phase detector generates the tuning voltage update, which is indicative of a phase relationship between the reference signal and an input signal. A feedback circuit detects the tuning voltage and generates an adjustment signal in response. The adjustment signal is then used to adjust the loop gain at any specific tuning voltage. In a specific example, the adjustment signal is used to adjust the current gain of the phase detector in a manner that is complementary to the non-linear voltage gain of the voltage-controlled oscillator.

Method and circuit for improving lock-time performance for a phase-locked loop

A high speed input buffer of the type having a first connection in electrical communication with a positive voltage source and a second connection in electrical communication with a negative voltage source. A first native transistor is functionally disposed between the positive voltage source and the first connection. A first contact of the first native transistor is electrically connected to the positive voltage source and a second contact of the first native transistor is electrically connected to the first connection. A second native transistor is functionally disposed between the negative voltage source and the second connection. A first contact of the second native transistor is electrically connected to the negative voltage source and a second contact of the second native transistor is electrically connected to the second connection.

Growing community of inventors

Colorado Springs, CO, United States of America

Edson Wayne Porter