Infineon Technologies Ag

Intel Deutschland Gmbh

Edmund Götz

Pietro Brenner

Günter Märzinger

Markus Scholz

Christian Muenker

Klaus Peter Meiser

A circuit arrangement with an interference protection is disclosed, including a supply line and a ground line, a first circuit and a second circuit. Each of the first and second circuit is connected to the supply line and to the ground line. The circuit arrangement also includes a blocking device coupled to at least the supply line to suppress any interfering signals from being applied to the supply line.

Circuit arrangement with interference protection

The present disclosure relates to circuits and methods for accelerating a new frequency lock-in process of a digital phase-locked loop.

Phase alignment circuit for a TDC in a DPLL

A circuit arrangement includes a phase locked loop configured to produce a controlled frequency. The phase locked loop has an actuating input and a control loop output, with it being possible to tap off the frequency at the control loop output. In addition, a frequency meter is provided, which is connected to the control loop output of the phase locked loop. The frequency meter is configured to measure the frequency of the phase locked loop. Finally, a computation unit is provided in order to determine a gradient associated with the phase locked loop and generate a correction value based thereon, wherein the correction value is employed to mitigate a deterioration in the loop bandwidth due to variations in the gradient.

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Dachau, Germany

Edmund Götz