Texas Instruments Corporation

Edmund G Russell

Brian Keith Kirkpatrick

Freidoon Mehrad

Zhihao Chen

Jon Holt

Jeff White

Jason D Mehigan

Victor Watt

Beth Walden

A trench structure in a wafer of semiconductor material and the method of forming the trench structure are described. The trench structure is formed on a semiconductor wafer that has a top surface of slow oxidization rate&#x2014;slower than that of other major crystallographic planes of the semiconductor material. The trench is etched into the semiconductor wafer. The trench has substantially vertical trench-sidewalls near the top surface, the vertical trench-sidewalls near the top surface containing crystallographic plane that oxidizes at a rate comparable to that of the top surface. An insulating layer is grown on the top surface and on the trench-sidewalls and on corners where sidewall surfaces approach the top surface, the insulating layer at the corners being substantially thicker than at the sidewall adjacent to the corners. The difference in the oxide thickness is due to the faster oxidizing planes exposed at the corners. Finally, the trench is filled with a dielectric material.

Method to form shallow trench isolation with rounded upper corner for advanced semiconductor circuits

Using deuterium oxygen during stream oxidation forms an oxidizing vapor. Since deuterium is chemically similar to hydrogen, the oxidation process takes place normally and the silicon-silicon oxide interface is concurrently saturated with deuterium. Saturating the interface with deuterium reduces the interface trap density thereby reducing channel hot carrier degradation.

Method to reduce charge interface traps and channel hot carrier degradation

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Edmund G Russell