Siemens Enterprise Communications Gmbh & Co. Kg

Uniscon Universal Identity Control Gmbh

Siemens Aktiengesellschaft

Unify Gmbh Co. Kg

Edmund Ernst

Karl Klug

Stephan Schaade

Hubert Jäger

Jürgen Brieskorn

Ralf Rieken

Annette Roder

Wolfgang Kosler

Arnold Monitzer

Mike Thoms

Franz Stark

Michael Kellermann

A system for reliable data processing is provided, wherein the system is implemented in a sealed infrastructure, wherein the sealed infrastructure comprises at least one processing area and a storage area, wherein the network area, the processing area, and the storage area are separated from each other physically, wherein the processing area is adapted to receive data from the storage area and/or from the network area in encrypted form, to decrypt to process the received data, and to transmit the processed data in encrypted form to the storage area and/or to the network area. Further, a method for reliable processing of data in a system according to the invention is provided.

Data processing means and method for operating the same

A method is provided for securely and efficiently accessing connection data of at least one telecommunication provider is provided, wherein the connection data is ascertained by the telecommunication provider and is encrypted by the telecommunication provider, the encrypted connection data is transmitted from the telecommunication provider to a secured environment, the connection data is decrypted in the secured environment and, for a first predetermined time period, is stored as decrypted connection data exclusively in a volatile memory of the secured environment, and the access to the connection data is exclusively granted as access to the decrypted connection data stored in the volatile memory of the secured environment via a predetermined interface of the secured environment.

Method for securely and efficiently accessing connection data

The invention relates to a method for operating an electronic system, wherein the energy consumption of at least parts of the system is regulated such that on the basis of at least a time-related curve of the current (IFE, . . . , IFEn) detected within the system, a gradient value (diFE, . . . , diFEn) of the current value generated at least partially from circuitry is formed. On the basis of the gradient value, a circuit-related manipulation of at least one physical variable of the system is carried out. The invention further relates to an arrangement for carrying out the method.

Method and arrangement for saving energy in microprocessors

Method for an electronic device (IT) that is controllable in at least one operating state (OP) and one standby state (SBY), with which a main processing unit (MPU) controls the operating state (OP) and a preprocessing unit (PPU) controls the standby state (SBY), such that, by means of the preprocessing unit (PPU), the main processing unit (MPU) and, to some extent, the functional units of the electronic device (IT) that are implemented by circuitry are switched by the control into at least one state having reduced energy consumption. An advantage can be seen in the fact that, by using a preprocessing unit (PPU), in the operating state of 'standby' (SBY) the total energy consumption of the electronic device (IT) is reduced, both due to the significantly reduced energy consumption of a preprocessor (PPE) in the preprocessing unit (PPU) and to the units (MPU) that have been switched by the control into a state having reduced energy consumption, and the electronic device can therefore be operated more economically. An additional advantage is that the reduction of the energy consumption is achieved exclusively by circuitry measures and that no implementations must be included in the programs of the electronic device (IT).

Electronic apparatus having reducible power consumption in the readiness state

The invention relates to a method and to an arrangement for the imaging representation of information, particularly for use with communication terminals. The arrangement comprises an image output device having at least one first partial region and at least one second partial region, wherein the first partial region is designed such that the representation of the information is optimized for high-quality imaging and the second partial region is designed such that it is optimized for lower-quality imaging. According to the method, the first partial region is activated when data is present for output using high-quality imaging, while the second partial region is always actively operated.

Method and arrangement for the imaging representation of information, particularly for use with communication terminals

The method controls the sequence (Q) of accesses (Z) of a processor (MP) to an allocated memory (SP) that is formed by at least two individually addressable, static sub-memories or, respectively, memory banks (SRAM 0, 1). Using a drive logic (ASL) inserted between the processor (MP) and, for example, two sub-memories (SRAM 0, 1), a first memory address (sa1) is switched in conformity with an access cycle to the addressed sub-memory (SRAM 0, 1) in a first access (Z) of a sequence (Q), a memory link address (sfa1) for the further sub-memories (SRAM 0, 1) is formed, is switched thereto and a reading or writing of a data (d) is initiated based on the criterion of the status information (sti). Subsequently, the sub-memories (SRAM 0, 1) are cyclically successively driven, a respective data (d) is read or stored using an intermediate memory (ZSP) and a memory link address (sfa2, 3) is respectively formed such that the two sub-memories (SRAM 0, 1) are successively and cyclically driven. As a result of the method, an especially advantageous memory design for communication systems (KS), particularly for telecommunication private branch exchanges, is realized with static sub-memories (SRAM 0, 1), whereby the memory accesses (Z) of a sequence (Q) of accesses (Z) occur at maximum processor access speed.

Growing community of inventors

Munich, Germany

Edmund Ernst