3com Corporation

Telefonaktiebolaget Lm Ericsson (publ)

Edmund C Chen

Claude G Hayek

Michael Feng

Edward Ho

Glen H Lowe

Glenn William Connery

Paul J Sidenblad

Jahan Lotfi

Robert G Hathaway

Ranjit Joseph Rozario

Brian Alleyne

Thomas C Yip

Patrick Wang

Sun Den Chen

Stephen Chow

Stephan G Meier

Ramanathan Lakshmikanthan

Srivi Dhruvanarayan

Jayaram Beladakere

A method for packet job scheduler in data processing based on workload self-learning is disclosed. In response to receiving an incoming packet, the packet processor checks workload usage of an isolation group (IG) associated with the incoming packet, the IG being a classification of packets defined for the purpose of processing the incoming packet. The packet processor then determines whether the workload usage of the IG associated with the incoming packet exceeds a predetermined threshold. In response to the workload usage of the IG associated with the incoming packet not exceeding the predetermined threshold, the packet processor forwards the incoming packet to be executed by a packet execution unit, and then it updates the workload usage of the IG associated with the incoming packet based on execution of the incoming packet by the packet execution unit.

Method and system for packet job scheduler in data processing based on workload self-learning

A method for processing data packets in a pipeline and executed by a network processor. The pipeline includes a plurality of logical blocks, each logical block configured to process one stage of the pipeline. Each data packet includes a descriptor and a data. The network processor is coupled to a resource for storing the data. The method reduces latency and enables non-blocking processing of data packets by forwarding a unique identification of a write request from a first logical block to a subsequent second logical block in the pipeline, the write request to modify the data in the resource. The method includes receiving the descriptor for processing at the first logical block, generating the write request and the unique identification for the write request, transmitting the write request to the resource, and transmitting the unique identification towards the second logical block before an acknowledgement is returned by the resource.

Acknowledgement forwarding

A method executed by a controller of a plurality of processing elements to reduce processing time of a data packet in a network element. The processing elements are arranged in a matrix. Each processing element has a point to point connection with each adjacent processing element, known as a hop. Each processing element also includes a separate processing element storage. The data packet includes a data and a descriptor, the data being transmitted to a first processing element for storage before the descriptor is received by the controller, and the data being processed after the descriptor is received. The method includes receiving the descriptor at the controller, determining that the first processing element does not have an available resource for processing the data, determining a second processing element based on a least number of hops to the first processing element, and transmitting the descriptor to the second processing element.

Job homing

Embodiments of the invention include a method for avoiding memory bandwidth utilization during packet processing. The packet processing core receives a plurality of packets. The packet processing core identifies the packet's quality of service (QoS) descriptor. The packet processing core determines that at least one packet should be moved to an off-chip packet stored prior to the packet being transmitted to the egress port. The packet processing core bases that determination, at least in part, on the packet's QoS descriptor. The packet processing core moves the determined packets to the off-chip packet store. The packet processing core determines that at least one packet should not be moved to the off-chip packet store prior to the packet being transmitted to the egress port. This determination is also made, at least in part, based on the packet's QoS descriptor.

On-chip packet cut-through

A hierarchical pipelined distributed scheduling traffic manager includes multiple hierarchical levels to perform hierarchical winner selection and propagation in a pipeline including selecting and propagating winner queues of a lower level to subsequent levels to determine one final winning queue. The winner selection and propagation is performed in parallel between the levels to reduce the time required in selecting the final winning queue. In some embodiments, the hierarchical traffic manager is separated into multiple separate sliced hierarchical traffic managers to distributively process the traffic.

Hierarchical pipelined distributed scheduling traffic manager

A method and system for efficiently servicing a peripheral component event. In one embodiment of the present invention, peripheral component events are coalesced. The time interval between succeeding peripheral component events is determined. This time interval is then compared to a time threshold. This process continues until the time interval between succeeding peripheral component events meets or exceeds the time threshold. Once the time interval between succeeding peripheral component events meets or exceeds the time threshold, an interrupt is generated. By appropriately selecting a time threshold, idle periods are identified. Thus, the present invention generates interrupts when idle conditions exist, optimizing the generation of interrupts. By optimizing the generation of interrupts, the number of interrupts generated is reduced, minimizing the CPU overhead associated with the servicing of interrupts.

Interrupt optimization using time between succeeding peripheral component events

A method and system for efficiently servicing a peripheral component event. In one embodiment of the present invention, peripheral component events are coalesced. The time that a peripheral component event has been stored is determined. This time interval is then compared to a storage time threshold. This process continues until the time that a peripheral component event has been stored meets or exceeds the storage time threshold. Once time that a peripheral component event has been stored meets or exceeds the storage time threshold, an interrupt is generated. By appropriately selecting a storage time threshold, the generation of interrupts is optimized. As a result, the present invention optimizes the generation of interrupts, reducing the frequency with which interrupts are generated, and minimizing the CPU overhead associated with the servicing of interrupts.

Interrupt optimization using storage time for peripheral component events

A method and system for filtering multicast packets by a peripheral component. In one embodiment, the present invention uses a peripheral component driver to store in memory a selected hash values corresponding to desired multicast packets. In one embodiment, the peripheral component driver operates on a host computer to which a peripheral component is coupled. Next, when the peripheral component receives an incoming multicast packet, the present invention uses a hash value generator disposed on the peripheral component to determine a hash value for the received multicast packet. The present embodiment then compares the hash value for the received multicast packet with the selected hash values stored in memory. Provided the hash value for the received multicast packet does not match any of the selected hash values stored in the memory, the present embodiment discards the received multicast packet without interrupting the host computer. In so doing, the present embodiment effectively filters multicast packets without requiring constant intervention by the CPU (central processing unit) of the host computer.

Method and system for filtering multicast packets in a peripheral component environment

A method and system for efficiently servicing a peripheral component event. In one embodiment of the present invention, peripheral component events are coalesced. A peripheral component such as, for example, a network interface card generates a first interrupt when the number of coalesced peripheral component events meets a quantity threshold. In the present embodiment, a peripheral component driver such as, for example, a network interface card driver then services the first peripheral component event. In one embodiment of the present invention, the peripheral component then services any existing coalesced peripheral component event (or events) that has not yet generated a respective interrupt. The service of peripheral component events is monitored for determining the quantity of peripheral component events not serviced. The number of peripheral component events not serviced is then used to vary the quantity threshold. The new quantity threshold is then used to determine when a second interrupt is to be generated. As a result, the present invention optimizes the generation of interrupts, reducing the frequency with which interrupts are generated, and minimizing the CPU overhead associated with the servicing of interrupts.

Interrupt optimization using varying quantity threshold

A method and system for efficiently servicing a peripheral component event. In one embodiment of the present invention, a peripheral component such as, for example, a network interface card generates a first interrupt upon the occurrence of a first peripheral component event. In the present embodiment, a peripheral component driver such as, for example, a network interface card driver then services the first peripheral component event. In this embodiment of the present invention, the peripheral component then services any existing coalesced peripheral component event (or events) which has not yet generated a respective interrupt. In so doing, the present embodiment eliminates the need for the existing coalesced peripheral component event to generate an additional interrupt at some later time. As a result, the present embodiment reduces the frequency with which interrupts are generated, and minimizes the CPU overhead associated with the servicing of interrupts.

Interrupt events chaining

A system and method for dynamically calculating the maximum amount of time a peripheral component event can be stored before generating a corresponding interrupt. Specifically, in this embodiment, the host computer is adapted to have a peripheral component removably coupled thereto and is adapted to operate a peripheral component driver. The peripheral component driver, in turn, is adapted to dynamically calculate the maximum amount of time a peripheral component event can be stored before generating a corresponding interrupt. The peripheral component of this embodiment is adapted to store the peripheral component event and cause the generation of an interrupt when the peripheral component event has been stored for the maximum amount of time. Once again, the present embodiment, like the previous embodiments, reduces the frequency with which interrupts are generated, and minimizes the CPU overhead associated with the servicing of interrupts.

System and method for dynamically selecting interrupt storage time threshold parameters

A system and method for dynamically calculating the quantity of peripheral component events to coalesce. In one embodiment, a host computer is adapted to have a peripheral component removably coupled thereto. The host computer is further adapted to operate a peripheral component driver. The peripheral component driver of the present embodiment is adapted to dynamically determine the quantity of peripheral component events to coalesce. The peripheral component is adapted to coalesce the determined quantity of the peripheral component events. Furthermore, the peripheral component is adapted to cause the generation of an interrupt upon the occurrence of the determined quantity of the peripheral component events. Also, the present embodiment periodically re-determines the quantity of the peripheral components which should be coalesced. As a result, the present invention dynamically optimizes the frequency with which interrupts are generated, thereby minimizing the CPU overhead associated with the servicing of interrupts.

System and method for dynamically selecting interrupt quantity threshold parameters

A system and method for dynamically calculating a maximum allowable time interval which can lapse between peripheral component events before an interrupt is generated. In this embodiment, the host computer is adapted to have a the peripheral component removably coupled thereto and operate a peripheral component driver. The peripheral component driver in this embodiment is adapted to dynamically calculate a maximum allowable time interval which can lapse between peripheral component events before an interrupt is generated. The peripheral component is correspondingly adapted to cause the generation of an interrupt when the maximum allowable time interval has elapsed between successive ones of the peripheral component events. As a result, the present embodiment, like the previous embodiment, reduces the frequency with which interrupts are generated, and minimizes the CPU overhead associated with the servicing of interrupts.

System and method for dynamically selecting interrupt time interval threshold parameters

A method and system for efficiently transferring data between a host computer and a peripheral component which is removably coupled to the host computer. In one embodiment of the present invention, a peripheral component driver such as, for example, a network interface card driver receives a request from a peripheral component, such as, for example, a network interface card, to transfer data from the peripheral component to memory of the host computer. The data to be transferred requires a first block of memory in the host computer wherein the first block of the memory has a first size. The present embodiment then allocates a second block of memory in the host computer to receive the data from the peripheral component. In the present invention, the second block of memory has a second size which is greater than the first size. Additionally, the second block of memory comprises an integer unit of the memory. In so doing, the present invention minimizes CPU overhead associated with data transfers between a peripheral component and the memory of a host computer. The present invention also reduces latency associated with data transfers between a peripheral component and the memory of a host computer.

System for allocating an integer unit of memory greater than a requested

A method and system for efficiently transferring data between a host computer and a peripheral component which is removably coupled to the host computer. In one embodiment of the present invention, a peripheral component such as, for example, a network interface card receives information from a peripheral component driver, such as, for example, a network interface card driver. In this embodiment, the information triggers the peripheral component to transmit a read request to the host computer such that the peripheral component can access data present at the host computer. Next, the peripheral component determines from the information received at the peripheral component, which type of read request to transmit to the host computer. In this embodiment, the type of read request is selected such that only a desired portion of the data will be prefetched and stored in memory of the host computer. The peripheral component then transmits the read request to the host computer such that the peripheral component has access to the portion of the data. In this invention, the portion of the data is selected such that when stored in the memory of the host computer, the portion of the data will end on a boundary of the memory. Then, the peripheral component reads the portion of the data which is stored in the memory of the host computer. In so doing, the present invention minimizes CPU overhead associated with prefetching data in response to a read request from a peripheral component.

Growing community of inventors

Sunnyvale, CA, United States of America

Edmund C Chen