Advanced Micro Devices Corporation

Edgar Munoz

Vydhyanathan Kalyanasundharam

Chintan S Patel

Alexander J Branover

Benjamin Tsien

Gregg Donley

The disclosed device includes a first register that stores a cumulative delta value and a second register that stores an average cache hit rate. The device also includes a control circuit that calculates a cache hit rate and updates the cumulative delta value based on the cache hit rate and the average cache hit rate. The control circuit also updates the average cache hit rate based on the updated cumulative delta value, and can update a cache allocation policy based on the updated average cache hit rate. Various other methods, systems, and computer-readable media are also disclosed.

Running average cache hit rate

A technique for operating a cache is disclosed. The technique includes based on a workload change, identifying a first allocation permissions policy; operating the cache according to the first allocation permissions policy; based on set sampling, identifying a second allocation permissions policy; and operating the cache according to the second allocation permissions policy.

Growing community of inventors

Austin, TX, United States of America

Edgar Munoz