Hewlett-packard Company

Agilent Technologies, Inc.

Ed O Schlotzhauer

John M Heumann

Bryan D Boswell

Kevin G Chandler

Barry A Alcorn

David T Crook

John E McDermid

Ronald K Kerschner

Ronald J Peiffer

Darvin Dale Raph

Daniel T Liles

A system and method are provided for validating a number of objects in a software application such as a testing system. The system comprises a processor and a memory that are electrically coupled to a local interface that may comprise, for example, a data bus and associated control bus. Stored on the memory and executed by the processor is a software application that includes validation logic. Broadly stated, the validation logic includes logic to detect at least one actual problem in an object of the software application, and logic to display at least one problem indication corresponding to the at least one actual problem in a context of the object.

System and method for validation of objects

A method for testing node interconnection on a circuit board. The method utilizes an automated test system having at least one test channel, wherein each test channel has a digital driver with a first input and a first output, and a digital receiver with a second output and a second input. The second input of the receiver is coupled to the first output of the driver and to a test probe. The test probe is configured to couple the driver and receiver to one of a plurality of nodes on a circuit board. During a node interconnection test, the driver of a first test channel applies a test signal to a selected node of the plurality of nodes. A predetermined amount of time after application of the test signal, the receiver of the first test channel reads a node voltage of the selected node. The node voltage is then compared to a predetermined threshold voltage of the receiver of the first test channel, and the result of the comparison is an indication as to whether the selected node is coupled to ground.

System and method for detecting shorts, opens and connected pins on a printed circuit board using automatic test equipment

A method for testing node isolation on a circuit board. The method utilizes an automated test system having a plurality of test channels, wherein each test channel has a digital driver with a first input and a first output, and a digital receiver with a second output and a second input. The second input of the receiver is coupled to the first output of the driver, to a number of switches, and to a test probe. The test probe is configured to couple the driver and receiver to one of a plurality of nodes on a circuit board. The number of switches are configured to selectively couple the first output and second input to ground. During a node isolation test, each node of a test node group is coupled to one of the test channels. But for a selected node of the test node group, each node of the test node group is coupled to ground via the number of switches of the test channels coupled to the nodes. Thereafter, a test signal is applied to the selected node via the digital driver of a first test channel which is coupled to the selected node. It is then determined if the digital receiver of the first test channel indicates that the selected node is coupled to ground, and whether the selected node is isolated from the remaining nodes of the test node group. If the selected node is not isolated from the remaining nodes of the test node group, the nodes of the test node group are released from ground, a test signal is once again applied to the selected node, and a determination is made as to whether the selected node is grounded to thereby determine if the selected node is directly connected to ground. Finally, if the selected node is not directly connected to ground, varying subsets of the remaining nodes are coupled to ground, a test signal is once again applied to the selected node, and a determination is made as to whether the selected node is grounded to thereby determine which nodes of the test node group the selected node is isolated from.

A method for testing node interconnection on a circuit board. The method utilizes an automated test system having at least one test channel, wherein each test channel has a digital driver with a first input and a first output, and a digital receiver with a second output and a second input. The second input of the receiver is coupled to the first output of the driver and to a test probe. The test probe is configured to couple the driver and receiver to one of a plurality of nodes on a circuit board. During a node interconnection test, a first selected node is coupled to a first test channel, and it is determined whether the first selected node is connected to ground. If the first selected node is not connected to ground, a second selected node is connected to ground; a test signal is applied to the first selected node via the digital driver of the first test channel; and it is determined whether the first selected node is connected to the second selected node.

System and method for detecting shorts, opens and connected pins on a

An automatic circuit board tester for testing for shorts, opens, and interconnected pins or nodes on a circuit board. The tester first classifies the nodes as being in one of three categories based upon the design of the board and the intended interconnection of the nodes. The categories of nodes are: (1) connected to ground; (2) interconnected to all other nodes in the test group; or (3) isolated from all other nodes. The circuit board tester has a testhead containing a plurality of test channels, each configured to be coupled to a node on the circuit board. The testhead utilizes a digital signal from a digital driver to drive the node, at a predetermined voltage and a digital receiver to read the node voltage to determine if it is coupled to ground. Each test channel also includes a switch to connect the digital driver and receiver to the test node as well as a ground switch to selectively couple the node to ground. Various combinations of switch positions and testing sequences enables the circuit board tester to test all node connections and to ensure that the physical embodiment of the circuit board accurately reflects the circuit board design.

An automatic circuit board tester for testing for shorts, opens, and interconnected pins or nodes on a circuit board. The tester first classifies the nodes as being in one of three categories based upon the design of the board and the intended interconnection of the nodes. The categories of nodes are: (1) connected to ground; (2) interconnected to all other nodes in the test group; or (3) isolated from all other nodes. The circuit board tester has a testhead containing a plurality of test channels, each configured to be coupled to a node on the circuit board. The testhead utilizes a digital signal from a digital driver to drive the node at a predetermined voltage and a digital receiver to read the node voltage to determine if it is coupled to ground. Each test channel also includes a switch to connect the digital driver and receiver to the test node as well as a ground switch to selectively couple the node to ground. Various combinations of switch positions and testing sequences enables the circuit board tester to test all node connections and to ensure that the physical embodiment of the circuit board accurately reflects the circuit board design.

System and method for detecting short, opens and connected pins on a

The present invention is an improved printed circuit board test system in which test probes are positioned to electronically engage a selected device or printed circuit board section on a printed circuit board for testing the printed circuit board for manufacturing defects. The printed circuit board test system uses a bed-of-nails test fixture to ground and excite predetermined sites on a first side of the printed circuit board and a robot to mechanically position test probe(s) at selected test sites on a second side of the printed circuit board. A controller is used to control the movement of the robotic tester and the selection of spring probes in the bed-of-nails fixture to be exited, grounded or measured.

Electrical assembly testing using robotic positioning of probes

The invention is a capacitively coupled probe which can be used for non-contact acquisition of both analog and digital signals. The probe includes a shielded probe tip, a probe body which is mechanically coupled to the probe tip, and an amplifier circuit disposed within the probe body. The amplifier circuit receives a capacitively sensed signal from the probe tip and produces an amplified signal in response thereto. The amplifier has a large bandwidth to accommodate high-frequency digital signals. Further, the amplifier has a very low input capacitance and a high input resistance to reduce signal attenuation and loading of the circuit being probed. The amplifier circuit is disposed in the probe body closely adjacent to the probe tip in order to reduce stray and distributed capacitances. A reconstruction circuit reconstructs digital signals from the amplified capacitively sensed signal.

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Loveland, CO, United States of America

Ed O Schlotzhauer